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參數(shù)資料
| 型號(hào)： | MC68HC916X1 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Modular Microcontroller(16位模塊化微控制器) |
| 中文描述： | 16位微控制器模塊（16位模塊化微控制器） |
| 文件頁(yè)數(shù)： | 112/172頁(yè) |
| 文件大小： | 1035K |
| 代理商： | MC68HC916X1 |
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MOTOROLA
112
MC68HC916X1
MC68HC916X1TS/D
CPTQP[3:0] — Completed Queue Pointer
CPTQP[3:0] points to the last command executed. It is updated when the current command is complete.
When the first command in a queue is executing, CPTQP[3:0] contains either the reset value ($0) or a
pointer to the last command completed in the previous queue.
7.4.3 QSPI RAM
The QSPI contains an 80-byte block of dual-access static RAM that is used by both the QSPI and
the CPU. The RAM is divided into three segments: receive data, transmit data, and command con-
trol data. Receive data is information received from a serial device external to the MCU. Transmit
data is information stored by the CPU for transmission to an external peripheral. Command control
data is used to perform the transfer.
Figure 21
displays the organization of the RAM.
Figure 21 QSPI RAM
Once the CPU has set up the queue of QSPI commands and enabled the QSPI, the QSPI can op-
erate independently of the CPU. The QSPI executes all of the commands in its queue, sets a flag
indicating that it is finished, and then either interrupts the CPU or waits for CPU intervention. It is
possible to execute a queue of commands repeatedly without CPU intervention.
RR[0:F]
— Receive Data RAM
Data received by the QSPI is stored in this segment. The CPU reads this segment to retrieve data
from the QSPI. Data stored in receive RAM is right-justified. Unused bits in a receive queue entry
are set to zero by the QSPI upon completion of the individual queue entry. The CPU can access
the data using byte, word, or long-word addressing.
$YFFD00
The CPTQP[3:0] value in SPSR shows which queue entries have been executed. The CPU uses
this information to determine which locations in receive RAM contain valid data before reading
them.
TR[0:F]
— Transmit Data RAM
Data that is to be transmitted by the QSPI is stored in this segment. The CPU usually writes one
word of data into this segment for each queue command to be executed.
$YFFD20
Information to be transmitted must be written to transmit data RAM in a right-justified format. The
QSPI cannot modify information in the transmit data RAM. The QSPI copies the information to its
data serializer for transmission. Information remains in transmit RAM until overwritten.
QSPI RAM MAP
RECEIVE
RAM
TRANSMIT
RAM
500
51E
520
53E
WORD
540
54F
COMMAND
RAM
BYTE
WORD
RR0
RR1
RR2
RRD
RRE
RRF
TR0
TR1
TR2
TRD
TRE
TRF
CR0
CR1
CR2
CRD
CRE
CRF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC98LJ12CFU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HC98LJ12CFUE | 功能描述:8位微控制器 -MCU 8 BIT MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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| MC68HCP11A1CFN3 | 功能描述:8位微控制器 -MCU 8-bit HCMOS single chip MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC68HCP11A1FN | 制造商:MOTORALA 功能描述: |
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