參數(shù)資料
型號: MC68HC705CL4FU
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1.84 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 92/101頁
文件大?。?/td> 517K
代理商: MC68HC705CL4FU
GENERAL RELEASE SPECIFICATION
February 12, 1997
MOTOROLA
ELECTRICAL SPECIFICATION
MC68HC05CL4
12-2
REV 2.0
12.3
DC ELECTRICAL CHARACTERISTICS
(VDD = 5.0 Vdc ±10%, VSS = 0 Vdc, TA = 0°C to +70°C, unless otherwise noted)
NOTES:
1.
All values shown reect average measurements.
2.
Typical values at midpoint of voltage range, 25
°C only.
3.
Wait IDD: Timer system active, carrier detect and ring detect circuit active.
4.
Run (Operating) IDD, Wait IDD: Measured using external square wave clock source to OSC1 (fOSC=4.0
MHz), all inputs 0.2 VDC from rail; no DC loads, less than 50pF on all outputs, CL=20 pF on OSC2.
5.
Wait, Stop IDD: All ports congured as inputs, VIL = 0.2 VDC, VIH = VDD–0.2 VDC.
6.
Stop IDD measured with OSC1=VSS.
7.
Wait IDD is affected linearly by the OSC2 capacitance.
Characteristic
Symbol
Min
Typ
Max
Unit
Output High Voltage (ILOAD = –0.8 mA)
PA0-PA7, PB0-PB5, TCMP
VOH
VDD–0.8
V
Output Low Voltage (ILOAD = +1.6 mA)
PA0-PA7, TCMP,
VOL
0.4
V
Input High Voltage
PA0-PA7, PB0-PB5, TCAP, RESET, IRQ,
OSC1
VIH
0.7 x VDD
—VDD
V
Input Low Voltage
PA0-PA7, PB0-PB5, PC0-PC7, PD0-PD7,
TCAP, RESET, IRQ, OSC1
VIL
VSS
0.2 x VDD
V
Supply Current (see Notes)
Run
Wait
Stop
25C
0C to +70C (Standard)
IDD
7
4.5
36
40
8
5
50
mA
A
I/O Ports Hi-Z Leakage Current
PA0-PA7, PB0-PB5
IIL
——
10
A
Input Current
RESET, IRQ, OSC1, TCAP
IIN
——
1
A
Capacitance
Ports (as Input or Output), RESET, IRQ,
OSC1, OSC2, TCAP,
COUT
CIN
12
8
pF
LCD Voltage Input
VLCD
Vss
—VDD
V
Low Voltage Interrupt Threshold Voltage
VLVI
4.5
V
Low Voltage Reset Threshold Voltage
VLVR
4.0
(100mV Hysteresis)
V
Input Threshold Voltage (CALLER ID)
Positive Going: VDD = 5V (RDI1, RT)
VT+
2.5
2.75
3.0
V
Input Threshold Voltage (CALLER ID)
Negative Going: VDD = 5V (RDI1, RT)
VT–
2.0
2.3
2.6
V
RDI2 Threshold (CALLER ID)
RD2VT
0.9
1.0
1.1
V
TIP/RING Input DC Resistance (CALLER ID)
RIN
500
k
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