參數(shù)資料
型號： MC68HC705CL4FU
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 1.84 MHz, MICROCONTROLLER, PQFP80
封裝： QFP-80
文件頁數(shù)： 71/101頁
文件大?。?/td> 517K
代理商： MC68HC705CL4FU
February 12, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05CL4
CALLER ID
MOTOROLA
REV 2.0
10-7
RDOE — Ring Detect Override Enable
Setting this bit allows the user to force the ring detect signal by writing a zero to
RDO, bit 1 in the CLCSR1 register.
CDEDG
When this bit is set, the Carrier Detect Interrupt Flag (Bit 5 of CLCSR1) will be
triggered at the falling edge of the carrier detect signal and will be cleared by
pulling reset low. If CDEDG is kept low, the Interrupt Flag is active for as long as
the carrier detect signal is valid.
RDEDG
When this bit is set, the Ring Detect Interrupt Flag (Bit 7 of CLCSR1) will be
triggered at the falling edge of the ring detect signal and will be cleared by pull-
ing reset low. If RDEDG is kept low, the Interrupt Flag is active for as long as
the ring detect signal is valid.
SDSL—Serial Data Select
When this bit is zero, the CIDSD bit is the output of the on-chip demodulator.
When this bit is set it disconnects the demodulator output from the CIDSD
which appears at the TCMP pin and the TCAP pin now becomes the input for
the CIDSD bit. This allows the external Caller ID device to interface directly with
the MCU. On reset this bit is cleared.
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