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參數(shù)資料
| 型號： | MC68HC705CL4FU |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 1.84 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 45/101頁 |
| 文件大?。?/td> | 517K |
| 代理商： | MC68HC705CL4FU |
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GENERAL RELEASE SPECIFICATION
February 12, 1997
MOTOROLA
TIMERS
MC68HC05CL4
8-6
REV 2.0
8.1.2 Output Compare Register
The 16-bit output compare register is made up of two 8-bit registers at locations
$16 (MSB) and $17 (LSB). The output compare register is used for several pur-
poses, such as indicating when a period of time has elapsed. All bits are readable
and writable and are not altered by the timer hardware or reset. If the compare
function is not needed, the two bytes of the output compare register can be used
as storage locations.
The output compare register contents are compared with the contents of the free-
running counter continually, and if a match is found, the corresponding output
compare ag (OCF) bit is set and the corresponding output level (OLVL) bit is
clocked to an output level register. The output compare register values and the
output level bit should be changed after each successful comparison to establish
a new elapsed time-out. An interrupt can also accompany a successful output
compare provided the corresponding interrupt enable bit (OCIE) is set.
After a processor write cycle to the output compare register containing the MSB
($16), the output compare function is inhibited until the LSB ($17) is also written.
The user must write both bytes (locations) if the MSB is written rst. A write made
only to the LSB ($17) will not inhibit the compare function. The free-running
counter is updated every four internal bus clock cycles. The minimum time
required to update the output compare register is a function of the program rather
than the internal hardware.
The processor can write to either byte of the output compare register without
affecting the other byte. The output level (OLVL) bit is clocked to the output level
register regardless of whether the output compare ag (OCF) is set or clear.
X
7
X
XX
X
XXX
6543210
W
R
OCMPH
$0016
reset
OC15
OC14
OC13
OC12
OC11
OC10
OC9
OC8
X
7
X
XX
X
XXX
6543210
W
R
OCMPL
$0017
reset
OC7
OC6
OC5
OC4
OC3
OC2
OC1
OC0
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