
2.5 UART
122
Chapter 2: Hardware
Baud rate values are determined as follows.
b) Internal Timer
When bits CS2 to CS0 are set to ‘110,’ the internal timer signal is selected, and 16-bit timer 0
operates in reload mode. In this case, baud rates are determined as follows.
Asynchronous (start-stop synchronized)
(
φ ÷ N)/(16 × 2 × (n+1))
CLK synchronous
(
φ ÷ N)/(2 × (n+1))
N: timer count clock source
n: timer reload value
Table 2.5.6 shows the relation between baud rates and reload values (hexadecimal values) at a
machine cycle speed of 7.3728 MHz.
Table 2.5.6 Baud Rates and Reload Values
When selecting the internal timer (16-bit timer 0) as the baud rate clock source, note that the 16-bit
timer 0 output signal TOT0 is already connected to this controller internally. Therefore, it is not
necessary to make an external connection from the 16-bit timer 0 external output pins TIM0 to
TIM3 to the UART esternal clock input pin SCK. Also, this means that unless used in some other
fashion, the timer pins are available for use as I/O port pins.
c) External Clock
When bits CS2 to CS0 are set to ‘111’ the external clock source is selected and baud rates are
determined by the following formula, in which f represents the external clock frequency.
Asynchronous (start-stop synchronized) mode: f/16
CLK synchronous: f
Note that f has a maximum value of 1 MHz.
(1)
(
φ ÷ div)/(16 × 13)
(2)
(
φ ÷ div)/26
(3)
(
φ ÷ div)/(16 × 13 × 2) (φ represents machine cycle speed)
Reload value
N=21
(machine cycle division by 2)
N=23
(machine cycle division by 8)
Baud rate
38400
2
–
19200
5
–
9600
11
2
4800
23
5
2400
47
11
1200
95
23
600
191
47
300
383
95