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CHAPTER 3 CPU
3.7.5
Oscillation Stabilization Wait Time
If the main clock is operated in main RUN mode from a state in which the main clock is
stopped, for example, when the power is turned on, or in main stop mode or subclock
mode, it is necessary to take the oscillation stabilization wait time of the main clock.
Likewise, the oscillation stabilization wait time of the subclock is needed in sub-stop
mode because the oscillation of the subclock is stopped.
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Oscillation Stabilization Wait Time
Ceramic and crystal resonators generally take several ms to several dozens of ms to oscillate
steadily in natural frequency after starting oscillation.
Thus, CPU operation must be prohibited just after starting oscillation. The clock should be
supplied to CPU only when the oscillation is sufficiently stable after the passage of the
oscillation stabilization wait time.
Since the time needed to stabilize oscillation is dependent on the type (such as the crystal and
ceramic) of resonator connected to the oscillator (clock generator), an oscillation stabilization
wait time appropriate to the resonator to be used must be selected.
Figure 3.7-6 "Oscillator Operation after Oscillation Starts" shows an oscillator operation just
after the oscillation starts.
Figure 3.7-6 Oscillator Operation after Oscillation Starts
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Oscillation Stabilization Wait Time of the Main Clock
To start operation in main clock mode from a state in which the main clock is stopped, the
oscillation stabilization wait time of the main clock must be taken.
The oscillation stabilization wait time of the main clock is a time interval counted from when the
counter of the timebase timer is cleared until the overflow of the specified bit occurs.
H
Oscillation stabilization wait time during operation
One of the four kinds of oscillation stabilization wait time when returning to the main RUN mode
from the main stop mode by an external reset or when making a transition from the subclock
mode to the main clock mode can be selected using the oscillation stabilization wait time select
bits (SYCC: WT1, WT0) of the system clock control register.
( )
or reset operation
Oscillation stabilization
wait time
Normal operation, return
from the stop mode,
Oscillation start
X1
Oscillation stable
Resonator
oscillation time