參數(shù)資料
型號: M58WR064HU70ZB6U
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44
封裝: 7.70 X 9 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44
文件頁數(shù): 88/117頁
文件大?。?/td> 2300K
代理商: M58WR064HU70ZB6U
DC and AC parameters
M58WR064HU M58WR064HL
3. Sampled only, not 100% tested.
Table 25.
Write AC characteristics, Chip Enable controlled
Symbol
Alt
Parameter
M58WR064HU/L
Unit
70
Ch
ip
E
n
ab
le
Co
n
tro
lle
d
T
imin
gs
tAVAV
tWC
Address Valid to Next Address Valid
Min
70
ns
tAVLH
Address Valid to Latch Enable High
Min
7
ns
tDVEH
tDS
Data Valid to Chip Enable High
Min
40
ns
tEHDX
tDH
Chip Enable High to Input Transition
Min
0
ns
tEHEL
tWPH Chip Enable High to Chip Enable Low
Min
25
ns
tEHLL
Chip Enable High to Latch Enable Low
Min
0
ns
tEHWH
tCH
Chip Enable High to Write Enable High
Min
0
ns
tELEH
tWP
Chip Enable Low to Chip Enable High
Min
45
ns
tELLH
Chip Enable Low to Latch Enable High
Min
10
ns
tELQV
Chip Enable Low to Output Valid
Min
70
ns
tGHEL
Output Enable High to Chip Enable Low
Min
20
ns
tGHLL
Output Enable High to Latch Enable Low
Min
20
ns
tLHAX
Latch Enable High to Address Transition
Min
7
ns
tLHGL
Latch Enable High to Output Enable Low
Min
7
ns
tLLLH
Latch Enable Pulse Width
Min
7
ns
tWHEL(1)
1. tWHEL has the values shown when reading in the targeted bank or when reading following a Set
Configuration Register command. System designers should take this into account and may insert a
software No-Op instruction to delay the first read in the same bank after issuing any command and to delay
the first read to any address after issuing a Set Configuration Register command. If the first read after the
command is a Read Array operation in a different bank and no changes to the Configuration Register have
been issued, tWHEL is 0ns.
Write Enable High to Chip Enable Low
Min
25
ns
tWLEL
tCS
Write Enable Low to Chip Enable Low
Min
0
ns
Pr
ot
ec
tion
T
imi
ng
s
tEHVPL
Chip Enable High to VPP Low
Min
200
ns
tEHWPL
Chip Enable High to Write Protect Low
Min
200
ns
tQVVPL
Output (Status Register) Valid to VPP Low
Min
0
ns
tQVWPL
Output (Status Register) Valid to Write
Protect Low
Min
0
ns
tVPHEH
tVPS VPP High to Chip Enable High
Min
200
ns
tWPHEH
Write Protect High to Chip Enable High
Min
200
ns
相關(guān)PDF資料
PDF描述
M59DR032F100N1T 2M X 16 FLASH 1.8V PROM, 100 ns, PDSO48
M5F7924 24 V FIXED NEGATIVE REGULATOR, PSFM3
M5F7920 20 V FIXED NEGATIVE REGULATOR, PSFM3
M5F7918 18 V FIXED NEGATIVE REGULATOR, PSFM3
M5F7915 15 V FIXED NEGATIVE REGULATOR, PSFM3
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