
66
3803/3804 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
A-D CONVERTER
[A-D Conversion Register 1, 2 (AD1, AD2)]
0035
16
, 0038
16
The A-D conversion register is a read-only register that stores the
result of an A-D conversion. When reading this register during an
A-D conversion, the previous conversion result is read.
Bit 7 of the A-D conversion register 2 is the conversion mode se-
lection bit. When this bit is set to
“
0,
”
the A-D converter becomes
the 10-bit A-D mode. When this bit is set to
“
1,
”
that becomes the
8-bit A-D mode. The conversion result of the 8-bit A-D mode is
stored in the A-D conversion register 1. As for 10-bit A-D mode,
not only 10-bit reading but also only high-order 8-bit reading of
conversion result can be performed by selecting the reading pro-
cedure of the A-D conversion registers 1, 2 after A-D conversion is
completed (in Figure 58).
As for 10-bit A-D mode, the 8-bit reading inclined to MSB is per-
formed when reading the A-D converter register 1 after A-D
conversion is started; and when the A-D converter register 1 is
read after reading the A-D converter register 2, the 8-bit reading
inclined to LSB is performed.
[AD/DA Control Register (ADCON)] 0034
16
The AD/DA control register controls the A-D conversion process.
Bits 0 to 2 and bit 4 select a specific analog input pin. Bit 3 signals
the completion of an A-D conversion. The value of this bit remains
at
“
0
”
during an A-D conversion, and changes to
“
1
”
when an A-D
conversion ends. Writing
“
0
”
to this bit starts the A-D conversion.
Comparison Voltage Generator
The comparison voltage generator divides the voltage between
V
REF
and AV
SS
into 1024, and that outputs the comparison voltage
in the 10-bit A-D mode (256 division in 8-bit A-D mode).
The A-D converter successively compares the comparison voltage
V
ref
in each mode, dividing the V
REF
voltage (see below), with the
input voltage.
10-bit A-D mode (10-bit reading)
V
ref
=
n (n = 0
–
1023)
10-bit A-D mode (8-bit reading)
V
ref
=
n (n = 0
–
255)
8-bit A-D mode
V
ref
=
(n
–
0.5) (n = 1
–
255)
=0
(n = 0)
Fig. 57 Structure of AD/DA control register
Channel Selector
The channel selector selects one of ports P6
7
/AN
7
to P6
0
/AN
0
or
P0
7
/AN
15
to P0
0
/AN
8
, and inputs the voltage to the comparator.
Comparator and Control Circuit
The comparator and control circuit compares an analog input volt-
age with the comparison voltage, and then stores the result in the
A-D conversion registers 1, 2. When an A-D conversion is com-
pleted, the control circuit sets the AD conversion completion bit
and the AD interrupt request bit to
“
1
”
.
Note that because the comparator consists of a capacitor cou-
pling, set f(X
IN
) to 500 kHz or more during an A-D conversion.
Fig. 58 Structure of 10-bit A-D mode reading
AD/DA control register
(ADCON : address 0034
16
)
n
a
l
o
g
i
n
p
u
t
b
b
1
b
0
A
p
i
n
s
e
l
e
c
t
i
o
n
b
i
t
s
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
:
:
:
:
:
:
:
:
P
P
P
P
P
P
P
P
6
0
/
6
1
/
6
2
/
6
3
/
6
4
/
6
5
/
6
6
/
6
7
/
A
A
A
A
A
A
A
A
N
0
N
1
N
2
N
3
N
4
N
5
N
6
N
7
o
o
o
o
o
o
o
o
r
r
r
r
r
r
r
r
P
P
P
P
P
P
P
P
0
0
/
0
1
/
0
2
/
0
3
/
0
4
/
0
5
/
0
6
/
0
7
/
A
A
A
A
A
A
A
A
N
8
N
9
N
1
N
1
N
1
N
1
N
1
N
1
0
1
2
3
4
5
A
D
c
o
0
1
n
:
:
v
C
C
e
o
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r
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r
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c
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m
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t
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v
s
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o
A
n
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0
1
g
:
:
A
A
i
n
N
0
N
8
p
u
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t
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p
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A
n
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c
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b
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2
N
7
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5
e
N
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d
(
r
e
t
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s
“
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”
w
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e
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a
d
)
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A
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u
:
:
t
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A
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A
2
o
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u
:
:
t
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p
u
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2
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t
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1
6
b
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o
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b
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1
6
)
A
(
A
-
D
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2
c
o
:
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)
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A
(
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1
c
o
:
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1
8
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(
R
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c
:
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5
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)
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r
5
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1
6
)
-
n
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:
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a
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2
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e
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”
t
e
b
8
7 b
6 b
5 b
4 b
3 b
2 b
1 b0
b0
b
9
b
7
b0
9 b
8 b
7 b
6 b
5 b
4 b
3 b2
b
7
b0
0