
31
3803/3804 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
INTERRUPTS
The 3803 group
’
s interrupts are a type of vector and occur by 16
sources among 21 sources: eight external, twelve internal, and
one software.
The 3804 group
’
s interrupts occur by 16 sources among 23
sources: nine external, thirteen internal, and one software.
Interrupt Control
Each interrupt is controlled by an interrupt request bit, an interrupt
enable bit, and the interrupt disable flag except for the software in-
terrupt set by the BRK instruction. An interrupt occurs if the
corresponding interrupt request and enable bits are
“
1
”
and the in-
terrupt disable flag is
“
0
”
.
Interrupt enable bits can be set or cleared by software.
Interrupt request bits can be cleared by software, but cannot be
set by software.
The reset and the BRK instruction cannot be disabled with any
flag or bit. The I (interrupt disable) flag disables all interrupts ex-
cept the reset and the BRK instruction interrupt.
When several interrupt requests occur at the same time, the inter-
rupts are received according to priority.
Interrupt Operation
By acceptance of an interrupt, the following operations are auto-
matically performed:
1. The contents of the program counter and the processor status
register are automatically pushed onto the stack.
2. The interrupt disable flag is set and the corresponding interrupt
request bit is cleared.
3. The interrupt jump destination address is read from the vector
table into the program counter.
Interrupt Source Selection
Which of each combination of the following interrupt sources can
be selected by the interrupt source selection register (address
0039
16
).
1. INT
0
or Timer Z
2. Serial I/O1 transmission or SCL, SDA (for 3804 group)
3. CNTR
0
or SCL, SDA (for 3804 group)
4. CNTR
1
or Serial I/O3 reception
5. Serial I/O2 or Timer Z
6. INT
2
or I
2
C (for 3804 group)
7. INT
4
or CNTR
2
8. A-D converter or serial I/O3 transmission
External Interrupt Pin Selection
The occurrence sources of the external interrupt INT
0
and INT
4
can be selected from either input from INT
00
and INT
40
pin, or in-
put from INT
01
and INT
41
pin by the INT
0
, INT
4
interrupt switch bit
of interrupt edge selection register (bit 6 of address 003A
16
).
I
Notes
When setting of the following register or bit is changed, the inter-
rupt request bit may be set to
“
1.
”
Interrupt edge selection register (address 003A
16
)
Interrupt source selection register (address 0039
16
)
Accept the interrupt after clearing the interrupt request bit to
“
0
”
af-
ter interrupt is disabled and the above register or bit is set.