參數(shù)資料
型號: M37733MHB
廠商: Mitsubishi Electric Corporation
英文描述: Single Chip 16 Bits CMOS Microcomputer(16位單片機)
中文描述: 單片微機16位的CMOS(16位單片機)
文件頁數(shù): 31/89頁
文件大?。?/td> 1992K
代理商: M37733MHB
31
MITSUBISHI MICROCOMPUTERS
M37733MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Both
CTS
input
and
RTS
output
Both
CTS
input
and
RTS
output
Only
CTS
input
The interrupt vector and the interrupt control register are common to
the A-D conversion interrupt and UART2 transmit/receive interrupt.
It is switched by a selection of UART2 function as shown in Figure 37
and Table 5.
Figure 38 shows the connections of receiver/transmitter.
Figures 39 and 40 show the bit configuration of the UARTi transmit/
receive control register.
Each communication method is described below.
Fig. 38 Receiver and transmitter block diagram
Selection of clock
synchronous or
asynchronous (UART)
Selection of clock
synchronous or
asynchronous (UART)
Selection of clock
synchronous or
asynchronous (UART)
Transmit and receive
(2 systems)
Transmit and receive
(2 systems)
Transmit/receive
(1 system)
(Note)
Available
Available
Nothing
Available
Nothing
Nothing
Available
Available
Nothing
UART0
UART1
UART2
CTS
input/
RTS
output
Communication
method
Selection of data
output, CLK polarity,
transfer format
Multiple clocks
output
Sleep function
Interrupt
Table 5. Differences between UART0, UART1 and UART2
Note.
The interrupt vector and the interrupt control register are common to the A-D conversion interrupt and UART2 transmit/receive interrupt.
It is switched by a selection of UART2 function.
Bit converter
D
7
D
0
D
6
D
5
D
4
D
3
D
2
D
1
0
D
8
0
0
0
0
0
0
RxDi
Parity
bit
Stop
bit
Stop
bit
2 stop bit
1 stop bit
Parity
No
Parity
7 bit
8 bit
9 bit
Synchronous
Synchronous
8 bit
7 bit
9 bit
Synchronous
9 bit
Receive buffer
register
Receive
register
Data bus (odd)
Data bus (even)
Bit converter
D
7
8 bit
D
0
D
6
D
5
D
4
D
3
D
2
D
1
D
8
7 bit
TxDi
Parity
bit
Stop
bit
Parity
No
Parity
7 bit
8 bit
9 bit
Synchronous
8 bit
7 bit
Synchronous
9 bit
Transmission
buffer register
Transmission register
Data bus (odd)
Data bus (even)
nous
Synchro-
“0”
“0”
Stop
bit
2 stop bit
1 stop bit
(Note)
(Note)
Transmitter block diagram
Receiver block diagram
Note.
UART2 does not include the bit converter.
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