參數(shù)資料
型號(hào)： LU3X31FT
廠商： Lineage Power
英文描述： Single-Port 3 V 10/100 Ethernet Transceiver TX/FX(單端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器)
中文描述： 單端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯（單端口3伏1000萬(wàn)位和100米位以太網(wǎng)收發(fā)器）
文件頁(yè)數(shù)： 3/50頁(yè)
文件大小： 633K
代理商： LU3X31FT
Table of Contents
(continued)
Tables
(continued)
Page
Preliminary Data Sheet
July 2000
LU3X31FT Single-Port 3 V
10/100 Ethernet Transceiver TX/FX
Lucent Technologies Inc.
3
Table 14. MII Management Registers.................................................................................................................... 22
Table 15. Control Register (Register 0h) ............................................................................................................... 23
Table 16. Status Register Bit Definitions (Register 1h).......................................................................................... 25
Table 17. PHY Identifier (Register 2h)................................................................................................................... 26
Table 18. PHY Identifier (Register 3h)................................................................................................................... 27
Table 19. Autonegotiation Advertisement (Register 4h) ........................................................................................ 27
Table 20. Autonegotiation Link Partner Ability (Register 5h).................................................................................. 27
Table 21. Autonegotiation Expansion Register (Register 6h) ................................................................................ 28
Table 22. Isolate Counter (Register 12h)............................................................................................................... 28
Table 23. False Carrier Counter (Register 13h)..................................................................................................... 28
Table 24. Receive Error Counter (Register 15h).................................................................................................... 29
Table 25. PHY Control/Status Register (Register 17h).......................................................................................... 29
Table 26. Config 100 Register (Register 18h)........................................................................................................ 30
Table 27. PHY Address Register (Register 19h) ................................................................................................... 32
Table 28. Config 10 Register (Register 1Ah)......................................................................................................... 32
Table 29. Status 100 Register (Register 1Bh) ....................................................................................................... 33
Table 30. Status 10 Register (Register 1Ch)......................................................................................................... 33
Table 31. Interrupt Mask Register (Register 1Dh) ................................................................................................. 33
Table 32. Interrupt Status Register (Register 1Eh)................................................................................................ 34
Table 33. Absolute Maximum Ratings ................................................................................................................... 35
Table 34. Operating Conditions ............................................................................................................................. 35
Table 35. dc Characteristics................................................................................................................................... 36
Table 36. System Clock (Xin)................................................................................................................................. 36
Table 37. Transmit Clock (Input and Output).......................................................................................................... 37
Table 38. Management Clock ................................................................................................................................ 38
Table 39. MII Receive Timing ................................................................................................................................ 39
Table 40. MII Transmit Timing................................................................................................................................ 40
Table 41. Transmit Timing...................................................................................................................................... 41
Table 42. Receive Timing ...................................................................................................................................... 42
Table 43. Reset and Configuration Timing............................................................................................................. 43
Table 44. PMD Characteristics .............................................................................................................................. 44
Figures
Page
Figure 1. LU3X31FT Block Diagram........................................................................................................................ 4
Figure 2. Pin Diagram.............................................................................................................................................. 5
Figure 3. 100Base-X Data Path............................................................................................................................. 13
Figure 4. 10Base-T Module Data Path .................................................................................................................. 18
Figure 5. Hardware Reset Configurations ............................................................................................................. 21
Figure 6. System Timing........................................................................................................................................ 36
Figure 7. Transmit Timing (Input and Output)........................................................................................................ 37
Figure 8. Management Timing............................................................................................................................... 38
Figure 9. MII Receive Timing................................................................................................................................. 39
Figure 10. MII Transmit Timing.............................................................................................................................. 40
Figure 11. Transmit Timing.................................................................................................................................... 41
Figure 12. Receive Timing..................................................................................................................................... 42
Figure 13. Reset and Configuration Timing........................................................................................................... 43
Figure 14. PMD Timing.......................................................................................................................................... 44
Figure 15. Connection Diagrams (Frequency References) ................................................................................... 45
Figure 16. Connection Diagrams (10/100BTX Operation)..................................................................................... 46
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LU3X31T2T64 制造商:LUCENT 功能描述:NEW
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LU3X54FT 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX
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