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參數(shù)資料
| 型號： | LU3X31FT |
| 廠商： | Lineage Power |
| 英文描述： | Single-Port 3 V 10/100 Ethernet Transceiver TX/FX(單端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器) |
| 中文描述： | 單端口3伏10/100以太網(wǎng)收發(fā)器德克薩斯州/外匯（單端口3伏1000萬位和100米位以太網(wǎng)收發(fā)器） |
| 文件頁數(shù)： | 26/50頁 |
| 文件大?。?/td> | 633K |
| 代理商： | LU3X31FT |
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LU3X31FT Single-Port 3 V
10/100 Ethernet Transceiver TX/FX
Preliminary Data Sheet
July 2000
26
Lucent Technologies Inc.
Table 17. PHY Identifier (Register 2h)
5
Autonegotiation Complete
1
Autonegotiation process completed.
0
Autonegotiation process not com-
pleted.
If autonegotiation is enabled, this bit indi-
cates whether the autonegotiation process
has been completed.
1
Remote fault detected.
0
Remote fault not detected.
This bit is latched to 1 if the RF bit in the
autonegotiation link partner ability register
(bit 13, register address 05h) is set or the
receive channel meets the far-end fault
indication function criteria. It is unlatched
when this register is read.
1
Capable of autonegotiation.
0
Not capable of autonegotiation.
This bit defaults to 1, indicating that the
LU3X31FT is capable of autonegotiation.
1
Link is up.
0
Link is down.
This bit reflects the current state of the link-
test-fail state machine. Loss of a valid link
causes a 0 latched into this bit. It remains 0
until this register is read by the serial man-
agement interface.
1
Jabber condition detected.
0
Jabber condition not detected.
During 10Base-T operation, this bit indi-
cates the occurrence of a jabber condition.
It is implemented with a latching function
so that it becomes set until it is cleared by
a read.
1
Extended register set.
0
No extended register set.
This bit defaults to 1, indicating that the
LU3X31FT implements extended registers.
RO
0h
4
Remote Fault
RO, LH
0h
3
Autonegotiation Ability
RO
1h
2
Link Status
RO,
LL
0h
1
Jabber Detect
RO,
LH
0h
0
Extended Capability
RO
1h
Bit(s)
15:0
Name
Description
R/W
RO
Default
0043h
PHY-ID[31:16]
IEEE address.
Bit(s)
Name
Description
R/W
Default
MII Registers
(continued)
Table 16. Status Register Bit Definitions (Register 1h
) (continued)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LU3X32FT | Two-Port 3 V 10/100 Ethernet Transceiver TX/FX(雙端口 3 V 10M位和100M位以太網(wǎng)收發(fā)器) |
| LU3X34FT | Quad 3 V 10/100 Ethernet Transceiver TX/FX(四3 V 10/100以太網(wǎng)收發(fā)器) |
| LU3X51FT-J80 | Single-Port 3V 10/100 Ethernet TransceiverTX/FX(單端口3V 10/100以太網(wǎng)收發(fā)器) |
| LU3X54FTL | Quad-FET for 10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器) |
| LU5X31F | Gigabit Ethernet Transceiver(千兆位以太網(wǎng)收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LU3X31T2T64 | 制造商:LUCENT 功能描述:NEW |
| LU3X31T-T64 | 制造商:AGERE 制造商全稱:AGERE 功能描述:LU3X31T-T64 Single-Port 3 10/100 Ethernet Transceiver TX |
| LU3X34FTR | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X34FTR-HS128-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Quad 3 V 10/100 Ethernet Transceiver TX/FX |
| LU3X54FT | 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX |
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