參數(shù)資料
型號(hào): LMX2471
廠商: National Semiconductor Corporation
英文描述: 3.6 GHz Delta-Sigma Fractional-N PLL with 1.7 GHz Integer-N PLL
中文描述: 3.6 GHz的Δ-Σ分?jǐn)?shù)N與1.7 GHz的整數(shù)N分頻PLL鎖相環(huán)
文件頁數(shù): 30/36頁
文件大?。?/td> 458K
代理商: LMX2471
Programming Description
(Continued)
2.5 R4 REGISTER
This register controls the conditions for the RF PLL in Fastlock.
REGISTER
23
22
21
20
DATA[19:0] ( Except for the RF_N Register, which is [22:0] )
RF_CPF[3:0]
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
C3
0
C2
1
C1
1
C0
1
R4
CSR[1:0]
RF_TOC[13:0]
2.5.1 RF_TOC -- RF Time Out Counter and Control for FLoutRF Pin
The RF_TOC[13:0] word controls the operation of the RF Fastlock circuitry as well as the function of the FLoutRF output pin.
When this word is set to a value between 0 and 3, the RF Fastlock circuitry is disabled and the FLoutRF pin operates as a general
purpose CMOS TRI-STATE I/O. When RF_TOC is set to a value between 4 and 16383, the RF Fastlock mode is enabled and
the FLoutRF pin is utilized as the RF Fastlock output pin. The value programmed into the RF_TOC[13:0] word represents four
times the number of phase detector comparison cycles the RF synthesizer will spend in the Fastlock state.
RF_TOC[13:0]
0
1
Fastlock Mode
Disabled
Manual
Fastlock Period [CP events]
N/A
N/A
FLoutRF Pin Functionality
High Impedance
Logic “0” State.
Forces all fastlock conditions
Logic “0” State
Logic “1” State
Fastlock
Fastlock
Fastlock
Fastlock
2
3
4
5
Disabled
Disabled
Enabled
Enabled
Enabled
Enabled
N/A
N/A
4X2 = 8
5X2 = 10
16383X2=32766
16383
2.5.2 RF_CPF -- RF PLL Fastlock Charge Pump Current
Specify the charge pump current for the Fastlock operation mode for the RF PLL. Note that the Fastlock charge pump current,
steady state current, and CSR control are all interrelated. Refer to section 4.0 for more details.
RF_CPF [3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Fastlock Charge Pump Current (μA)
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
1500
1600
L
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