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參數(shù)資料
| 型號(hào)： | HYB25R128160C |
| 廠商： | SIEMENS AG |
| 英文描述： | 128-MBit Direct RDRAM(128 M位直接RDRAM) |
| 中文描述： | 128 - Mbit的直接的RDRAM（128米位直接的RDRAM） |
| 文件頁數(shù)： | 38/93頁 |
| 文件大?。?/td> | 919K |
| 代理商： | HYB25R128160C |
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Direct RDRAM
128/144-MBit (256K
×
16/18
×
32s)
Data Book
38
2.00
The second bubble type
t
CBUB2
is inserted (as a NOCOP command) by the controller between a WR
and RD command on the COL pins when there is a WR-WR-RD sequence to the same device. This
bubble enables write data to be retired from the write buffer without being lost, and is explained in
detail in
Figure 18
. There would be no bubble if address c0 and address d0 were directed to
different devices. This bubble appears on the DQA and DQB pins as
t
DBUB2
between a write data
dualoct D and read data dualoct Q. This bubble also appears on the ROW pins as
t
RBUB2
.
Figure 22
Interleaved RRWW Sequence with Two Dualoct Data Length
y1 = {Da, Ba+4, Cy1}
z1 = {Da, Ba+6, Cz1}
a1 = {Da, Ba, Ca1}
b1 = {Da, Ba+2, Cb1}
c1 = {Da, Ba+4, Cc1}
d1 = {Da, Ba+6, Cd1}
e1 = {Da, Ba, Ce1}
f1 = {Da, Ba+2, Cf1}
Transaction z: RD
Transaction a: RD
Transaction b: WR
Transaction c: WR
Transaction d: RD
Transaction e: RD
Transaction f: WR
Transaction y: WR
y0 = {Da, Ba+4, Ry}
z0 = {Da, Ba+6, Rz}
a0 = {Da, Ba, Ra}
b0 = {Da, Ba+2, Rb}
c0 = {Da, Ba+4, Rc}
d0 = {Da, Ba+6, Rd}
e0 = {Da, Ba, Re}
f0 = {Da, Ba+2, Rf}
SPT04226
f3 = {Da, Ba+2}
e3 = {Da, Ba}
d3 = {Da, Ba+6}
c3 = {Da, Ba+4}
b3 = {Da, Ba+2}
z3 = {Da, Ba+6}
a3 = {Da, Ba}
y3 = {Da, Ba+4}
e2 = {Da, Ba, Ce2}
f2 = {Da, Ba+2, Cf2}
a2 = {Da, Ba, Ca2}
b2 = {Da, Ba+2, Cb2}
d2 = {Da, Ba+6, Cd2}
c2 = {Da, Ba+4, Cc2}
z2 = {Da, Ba+6, Cz2}
y2 = {Da, Ba+4, Cy2}
WRA b2
PREX a3
T5
ACT a0
ROW0
DQB8...0
DQA8...0
COL4...COL0
t
D (y2)
DBUB1
RD z1
CBUB2
t
ROW2...
CTM/CFM
T0
T1
T2
T3
T4
ACT b0
ACT c0
RD a2
PREX z3
Q (z1)
DBUB2
t
RD a1
RD z2
Q (z2)
Q (a1)
CBUB1
WR b1
MSK (y2)
t
RBUB2
t
T10
T6
T7
T8
T9
T12
T11
T13 T14
T17
T16
T15
T18 T19
T22
T21
T20
T23 T24
Transaction e can use the
same bank as transaction a
RD d0
ACT e0
ACT d0
D (b2)
D (b1)
Q (a2)
WR c1
MSK (b1) MSK (b2)
WRA c2
D (c1)
D (c2)
DBUB1
t
NOCOP
MSK (c2)
CBUB2
MSK (c1)
NOCOP
t
RBUB2
t
T27
T26
T25
T28 T29
T32
T31
T30
T33 T34
T37
T36
T35
T38 T39
T42
T40 T41
T43 T44
T47
T45 T46
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| HYB3116160BST-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
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