參數(shù)資料
型號(hào)： HYB25R128160C
廠商： SIEMENS AG
英文描述： 128-MBit Direct RDRAM(128 M位直接RDRAM)
中文描述： 128 - Mbit的直接的RDRAM（128米位直接的RDRAM）
文件頁數(shù)： 13/93頁
文件大?。?/td> 919K
代理商： HYB25R128160C
Data Book
13
2.00
Direct RDRAM
128/144-MBit (256K
×
16/18
×
32s)
Table 10
shows the COLM and COLX field encodings. The M bit is asserted to specify a COLM
packet with two 8 bit bytemask fields MA and MB. If the M bit is not asserted, an COLX is specified.
It has device and bank address fields, and an opcode field. The primary use of the COLX packet is
to permit an independent PREX (precharge) command to be specified without consuming control
bandwidth on the ROW pins. It is also used for the CAL (calibrate) and SAM (sample) current control
commands (see “Current and Temperature Control” on page 65), and for the RLXX power mode
command (see “Power State Management” on page 58).
Table 10
COLM Packet and COLX Packet Field Encodings
M
DX4 … DX0
(selects device)
XOP4 …
0
Name
Command Description
1
----
–
MSK
MB/MA bytemasks used by WR/WRA.
0
/= (DEVID4 … 0)
–
–
No operation.
0
== (DEVID4 … 0) 00000
== (DEVID4 … 0) 1xxx0
1)
NOXOP
No operation.
0
1)
An “x” entry indicates which commands may be combined. For instance, the two commands PREX/RLXX may
be specified in one XOP value (10010).
PREX
Precharge bank BX4 … BX0 of this device (see
Figure 14
).
Calibrate (drive)
I
OL
current for this device (see
Figure 51
).
CAL/SAM Calibrate (drive) and Sample (update)
I
OL
current
for this device (see
Figure 51
).
0
== (DEVID4 … 0) x10x0
CAL
0
== (DEVID4 … 0) x11x0
0
== (DEVID4 … 0) xxx10
RLXX
Move this device into the standby (STBY) power
state (see
Figure 46
).
0
== (DEVID4 … 0) xxxx1
RSRV
Reserved, no operation.
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