參數(shù)資料
型號(hào): HB52RD168DB
廠(chǎng)商: Hitachi,Ltd.
英文描述: 128 MB Unbuffered SDRAM S.O.DIMM(128MB 未緩沖同步DRAM DIMM)
中文描述: 128 MB的無(wú)緩沖內(nèi)存的SODIMM(128MB的未緩沖同步的DRAM內(nèi)存)
文件頁(yè)數(shù): 42/67頁(yè)
文件大小: 623K
代理商: HB52RD168DB
HB52RD168DB-D
42
Read command to Write command interval:
1. Same bank, same ROW address:
When the write command is executed at the same ROW address of
the same bank as the preceding read command, the write command can be performed after an interval of no
less than 1 clock. However, DQMB must be set High so that the output buffer becomes High-Z before data
input.
READ to WRITE Command Interval (1)
CK
Command
Dout
in B2
in B3
READ
WRIT
in B0
in B1
High-Z
Din
CL=2
CL=3
DQMB
Burst Length = 4
Burst write
READ to WRITE Command Interval (2)
CK
Command
Dout
READ
WRIT
Din
CL=2
CL=3
DQMB
High-Z
2 clock
High-Z
2. Same bank, different ROW address:
When the ROW address changes, consecutive write commands
cannot be executed; it is necessary to separate the two commands with a precharge command and a bank-
active command.
3. Different bank:
When the bank changes, the write command can be performed after an interval of no
less than 1 clock, provided that the other bank is in the bank-active state. However, DQMB must be set
High so that the output buffer becomes High-Z before data input.
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