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2.9.2 Arbitrary Data Demultiplexing in Host Interface Mode
To select this mode, set ARBITMODE bit 0 in Host Interface
register 050h HIGH. In this mode, the DID, SDID, DC and
User
Data
Words
must
corresponding Host Interface registers. Set the video line
number for field 1 and field 2 from which the arbitrary data
packets
are
to
be
ARBITLINEA[11:0] and ARBITLINEB[11:0] Host Interface
be
programmed
in
the
demultiplexed
using
the
registers respectively. The arbitrary data packet is
demultiplexed when the ARBITON bit 1 in Host Interface
register 050h is set HIGH. ARBITON should be set LOW
when reading the arbitrary data packet User Data Words
from the ARBITUDW Host Interface registers.
2.10 ANCILLARY DATA DELETION
The GS1503 can be configured to delete the embedded
ancillary data packets, after demultiplexing. There are two
modes for ancillary data deletion.
2.10.1 Entire Ancillary Data Deletion
When the ANCI external pin or ANCI bit 1 of Host Interface
register 040h is set HIGH, all ancillary data packets in both
the Luma and Chroma channel of the input video stream
are deleted. The data is replaced with blanking values 040h
in the Luma channel and 200h in the Chroma channel. The
DEL_SEL bit 0 of Host Interface register 040h must be set
LOW.
Register Settings
NAME
DESCRIPTION
ADDRESS
BIT
SETTING
DEFAULT
ARBITON
Arbitrary packet demultiplex enable (1: Enabled)
Valid only when ARBITMODE is HIGH
050
1
1
0
ARBITMODE
Arbitrary packet mode selection
(0: External pin mode; 1: Host mode)
0
1
0
ARBITDID[7-0]
Arbitrary packet DID setting
051
7-0
-
0
ARBITSDID[7-0]
Arbitrary packet SDID setting
052
7-0
-
0
ARBITDC[7-0]
Arbitrary packet DC setting
053
7-0
-
0
ARBITLINEA[11:0]
Field 1 multiplexing line
054
055
3-0
7-0
-
0
ARBITLINEB[11:0]
Field 2 multiplexing line
056
057
3-0
7-0
-
0
ARBITUDW
Arbitrary packet UDW
100-1FE
7-0
-
0