
SMSC DS – FDC37N958FR
Page 123
Rev. 09/01/99
that no more data is required. PDRQ goes
inactive after nPDACK goes active for the last
byte of a data transfer (or on the active edge of
nIOR, on the last byte, if no edge is present on
nPDACK). If PDRQ goes inactive due to the FIFO
going empty, then PDRQ is active again as soon
as there is one byte in the FIFO. If PDRQ goes
inactive due to the TC, then PDRQ is active again
when there is one byte in the FIFO, and
serviceIntr has been re-enabled. (Note: A data
underrun may occur if PDRQ is not removed in
time to prevent an unwanted cycle.)
Programmed I/O Mode or Non-DMA Mode
The ECP or parallel port FIFOs may also be
operated using interrupt driven programmed I/O.
Software can determine the writeIntrThreshold,
readIntrThreshold, and FIFO depth by accessing
the FIFO in Test Mode. Programmed I/O
transfers are to the ecpDFifo at 400H and
ecpAFifo at 000H or from the ecpDFifo located at
400H, or to/from the tFifo at 400H. To use the
programmed I/O transfers, the host first sets up
the direction and state, sets dmaEn to 0 and
serviceIntr to 0. The ECP requests programmed
I/O transfers from the host by activating the
PINTR pin. The programmed I/O will empty or fill
the FIFO using the appropriate direction and
mode.
Note:
A threshold of 16 is equivalent to a
threshold of 15. These two cases are treated the
same.
Programmed I/O - Transfers from the FIFO to
the Host
In the reverse direction an interrupt occurs when
serviceIntr is 0 and readIntrThreshold bytes are
available in the FIFO. If at this time the FIFO is
full it can be emptied completely in a single
burst, otherwise readIntrThreshold bytes may be
read from the FIFO in a single burst.
readIntrThreshold = (16-<threshold>) data bytes
in FIFO
An interrupt is generated when serviceIntr is 0 and
the number of bytes in the FIFO is greater than or
equal to (16-<threshold>). (If the threshold = 12,
then the interrupt is set whenever there are 4-16
bytes in the FIFO.) The PINT pin can be used for
interrupt-driven systems. The host must respond
to the request by reading data from the FIFO.
This process is repeated until the last byte is
transferred out of the FIFO. If at this time the
FIFO is full, it can be completely emptied in a
single burst, otherwise a minimum of (16-
<threshold>) bytes may be read from the FIFO in
a single burst.
Programmed I/O - Transfers from the Host to
the FIFO
In the forward direction an interrupt occurs when
serviceIntr is 0 and there are writeIntrThreshold or
more bytes free in the FIFO. At this time if the
FIFO is empty it can be filled with a single burst
before the empty bit needs to be re-read.
Otherwise it may be filled with writeIntrThreshold
bytes.
writeIntrThreshold = (16-<threshold>) free bytes in
FIFO
An interrupt is generated when serviceIntr is 0 and
the number of bytes in the FIFO is less than or
equal to <threshold>. (If the threshold = 12, then
the interrupt is set whenever there are 12 or less
bytes of data in the FIFO.) The PINT pin can be
used for interrupt-driven systems. The host must
respond to the request by writing data to the FIFO.
If at this time the FIFO is empty, it can be
completely filled in a single burst, otherwise a
minimum of (16-<threshold>) bytes may be written
to the FIFO in a single burst. This process is
repeated until the last byte is transferred into the
FIFO.