參數(shù)資料
型號(hào): FDC37B787QF
廠商: SMSC Corporation
英文描述: Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR
中文描述: 超級(jí)I / O與ACPI支持控制器,實(shí)時(shí)時(shí)鐘和消費(fèi)性紅外
文件頁數(shù): 87/249頁
文件大?。?/td> 932K
代理商: FDC37B787QF
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88
INFRARED INTERFACE
The infrared interface provides a two-way wireless
communications
port
transmission medium. Several IR implementations
have been provided for the second UART in this
chip (logical device 5), IrDA, Consumer Remote
Control, and Amplitude Shift Keyed IR. The IR
transmission can use the standard UART2 TXD2
and RXD2 pins or optional IRTX and IRRX pins.
These can be selected through the configuration
registers.
IrDA 1.0 allows serial communication at baud rates
up to 115.2 kbps. Each word is sent serially
beginning with a zero value start bit. A zero is
signaled by sending a single IR pulse at the
beginning of the serial bit time. A one is signaled
by sending no IR pulse during the bit time. Please
refer to the AC timing for the parameters of these
pulses and the IrDA waveform.
The consumer remote control interface can
decode NEC PPM remote control frames in
hardware as well provide a general-purpose
synchronous
ASK
encoder/decoder
programmable carrier frequency and bit rates to
emulate many other popular remote control
encoding formats; including 38 kHz PPM, PWM
and RC-5.
Consult the SMSC CIrCC data sheet
for more details.
using
infrared
as
a
with
The
asynchronous serial communication at baud rates
up to 19.2K Baud. Each word is sent serially
beginning with a zero value start bit. A zero is
signaled by sending a 500KHz waveform for the
duration of the serial bit time. A one is signaled by
sending no transmission during the bit time.
Please refer to the AC timing for the parameters of
the ASK-IR waveform.
If the Half-Duplex option is chosen, there is a time-
out when the direction of the transmission is
changed. This time-out starts at the last bit
transferred during a transmission and blocks the
receiver input until the timeout expires. If the
transmit buffer is loaded with more data before the
time-out expires, the timer is restarted after the
new byte is transmitted. If data is loaded into the
transmit buffer while a character is being received,
the transmission will not start until the time-out
expires after the last receive bit has been
received. If the start bit of another character is
received during this time-out, the timer is restarted
after the new character is received. The IR half-
duplex time-out is programmable via CRF2 in
Logical Device 5. This register allows the time-out
to be programmed to any value between 0 and
10msec in 100usec increments.
Amplitude
Shift
Keyed
IR
allows
PARALLEL PORT
This chip incorporates an IBM XT/AT compatible
parallel port. This supports the optional PS/2 type
bi-directional parallel port (SPP), the Enhanced
Parallel Port (EPP) and the Extended Capabilities
Port (ECP) parallel port modes. Refer to the
Configuration
Registers
disabling, power down, changing the base address
of the parallel port, and selecting the mode of
operation.
This chip also provides a mode for support of the
floppy disk controller on the parallel port.
The parallel port also incorporates SMSC's
ChiProtect circuitry, which prevents possible
for
information
on
damage to the parallel port due to printer power-
up.
The functionality of the Parallel Port is achieved
through the use of eight addressable ports, with
their associated registers and control gating. The
control and data port are read/write by the CPU,
the status port is read/write in the EPP mode. The
address map of the Parallel Port is shown below:
DATA PORT
STATUS PORT
CONTROL PORT
EPP ADDR PORT
EPP DATA PORT 0
BASE ADDRESS + 00H
BASE ADDRESS + 01H
BASE ADDRESS + 02H
BASE ADDRESS + 03H
BASE ADDRESS + 04H
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