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參數(shù)資料
| 型號： | FDC37B787QF |
| 廠商： | SMSC Corporation |
| 英文描述： | Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR |
| 中文描述： | 超級I / O與ACPI支持控制器，實時時鐘和消費性紅外 |
| 文件頁數(shù)： | 105/249頁 |
| 文件大小： | 932K |
| 代理商： | FDC37B787QF |
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Command/Data
ECP Mode supports two advanced features to
improve the effectiveness of the protocol for some
applications. The features are implemented by
allowing the transfer of normal 8 bit data or 8 bit
commands.
When in the forward direction, normal data is
transferred when HostAck is high and an 8 bit
command is transferred when HostAck is low.
The most significant bit of the command indicates
whether it is a run-length count (for compression)
or a channel address.
When in the reverse direction, normal data is
transferred when PeriphAck is high and an 8 bit
command is transferred when PeriphAck is low.
The most significant bit of the command is always
zero. Reverse channel addresses are seldom
used and may not be supported in hardware.
Table 45 –
Forward Channel Commands (HostAck Low)
Reverse Channel Commands (PeripAck Low)
D7
0
Run-Length Count (0-127) (mode
0011 0X00 only)
1
Channel Address (0-127)
Data Compression
The ECP port supports run length encoded (RLE)
decompression in hardware and can transfer
compressed data to a peripheral. Run length
encoded (RLE) compression in hardware is not
supported. To transfer compressed data in ECP
mode, the compression count is written to the
ecpAFifo and the data byte is written to the
ecpDFifo.
Compression
is
accomplished
identical bytes and transmitting an RLE byte that
indicates how many times the next byte is to be
repeated. Decompression simply intercepts the
RLE byte and repeats the following byte the
specified number of times. When a run-length
count is received from a peripheral, the
105
D[6:0]
by
counting
subsequent data byte is replicated the specified
number of times. A run-length count of zero
specifies that only one byte of data is represented
by the next data byte, whereas a run-length count
of 127 indicates that the next byte should be
expanded to 128 bytes. To prevent data
expansion, however, run-length counts of zero
should be avoided.
Pin Definition
The drivers for nStrobe, nAutoFd, nInit and
nSelectIn are open-collector in mode 000 and are
push-pull in all other modes.
ISA Connections
The interface can never stall causing the host to
hang. The width of data transfers is strictly
controlled on an I/O address basis per this
specification. All FIFO-DMA transfers are byte
wide, byte aligned and end on a byte boundary.
(The PWord value can be obtained by reading
Configuration Register A, cnfgA, described in the
next section). Single byte wide transfers are
always possible with standard or PS/2 mode using
program control of the control signals.
Interrupts
The interrupts are enabled by serviceIntr in the ecr
register.
serviceIntr = 1 Disables the DMA and all of the
service interrupts.
serviceIntr = 0 Enables the selected interrupt
condition. If the interrupting
condition is valid, then the
interrupt
immediately when this bit is
changed from a 1 to a 0. This
can occur during Programmed
I/O if the number of bytes
removed or added from/to the
FIFO does not cross the
threshold.
The interrupt generated is ISA friendly in that it
must pulse the interrupt line low, allowing for
is
generated
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| FDC37B787QFP | 功能描述:輸入/輸出控制器接口集成電路 Enhanced Super I/O Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
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| FDC37B78X_07 | 制造商:SMSC 制造商全稱:SMSC 功能描述:Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR |
| FDC37B802 | 制造商:Rochester Electronics LLC 功能描述: |
| FDC37B802QFP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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