參數(shù)資料
型號(hào): COP8SDR9
廠(chǎng)商: National Semiconductor Corporation
英文描述: 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲(chǔ)器的帶32K存儲(chǔ)器,虛擬EEPROM和電壓過(guò)低復(fù)位的微控制器)
中文描述: 8位CMOS閃存為基礎(chǔ)的32K的內(nèi)存,虛擬EEPROM和欠壓(8位基于的CMOS閃速存儲(chǔ)器的帶32K的存儲(chǔ)器,微控制器虛擬的EEPROM和電壓過(guò)低復(fù)位的微控制器)
文件頁(yè)數(shù): 36/68頁(yè)
文件大?。?/td> 714K
代理商: COP8SDR9
8.0 USART
The device contains a full-duplex software programmable
USART. The USART (Figure 21) consists of a transmit shift
register, a receive shift register and seven addressable reg-
isters, as follows: a transmit buffer register (TBUF), a re-
ceiver buffer register (RBUF), a USART control and status
register (ENU), a USART receive control and status register
(ENUR), a USART interrupt and clock source register
(ENUI), a prescaler select register (PSR) and baud (BAUD)
register. The ENU register contains flags for transmit and
receive functions; this register also determines the length of
the data frame (7, 8 or 9 bits), the value of the ninth bit in
transmission, and parity selection bits. The ENUR register
flags framing, data overrun, parity errors and line breaks
while the USART is receiving.
Other functions of the ENUR register include saving the
ninth bit received in the data frame, enabling or disabling the
USART’s attention mode of operation and providing addi-
tional receiver/transmitter status information via RCVG and
XMTG bits. The determination of an internal or external clock
source is done by the ENUI register, as well as selecting the
number of stop bits and enabling or disabling transmit and
receive interrupts. A control flag in this register can also
select the USART mode of operation: asynchronous or
synchronous.
DS101389-25
FIGURE 21. USART Block Diagram
C
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