參數資料
型號: COP8SDR9
廠商: National Semiconductor Corporation
英文描述: 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲器的帶32K存儲器,虛擬EEPROM和電壓過低復位的微控制器)
中文描述: 8位CMOS閃存為基礎的32K的內存,虛擬EEPROM和欠壓(8位基于的CMOS閃速存儲器的帶32K的存儲器,微控制器虛擬的EEPROM和電壓過低復位的微控制器)
文件頁數: 22/68頁
文件大?。?/td> 714K
代理商: COP8SDR9
5.0 In-System Programming
(Continued)
TABLE 11. MICROWIRE/PLUS ISP Commands
Command
Function
Command
Value (Hex)
0x3B
0xB3
0xBF
Parameters
Return Data
PGMTIM_SET
PAGE_ERASE
MASS_ERASE
Write Pulse Timing Register
Page Erase
Mass Erase
Value
Starting Address of Page
Confirmation Code
N/A
N/A
N/A (The entire Flash Memory
will be erased)
Data Byte if Security not set.
0xFF if Security set.
Option Register if address =
0xFFFF, regardless of
Security
n Data Bytes if Security not
set.
n Bytes of 0xFF if Security
set.
N/A
READ_BYTE
Read Byte
0x1D
Address High, Address Low
BLOCKR
Block Read
0xA3
Address High, Address Low,
Byte Count (n) High, Byte
Count (n) Low
0
n
32767
Address High, Address Low,
Data Byte
Address High, Address Low,
Byte Count (0
n
16), n
Data Bytes
N/A
Any other invalid command
will be ignored
WRITE_BYTE
Write Byte
0x71
BLOCKW
Block Write
0x8F
N/A
EXIT
INVALID
EXIT
N/A
0xD3
N/A (Device will Reset)
N/A
Note:
The user must ensure that Block Writes do not cross a 64 byte boundary within one operation.
5.8 USER ISP AND VIRTUAL E
2
The following commands will support transferring blocks of
data from RAM to flash program memory, and vice-versa.
The user is expected to enforce application security in this
case.
Erase the entire flash program memory (mass erase).
NOTE: Execution of this command will force the device
into the MICROWIRE/PLUS ISP mode.
Erase a page of flash memory at a specified address.
Read a byte from a specified address.
Write a byte to a specified address.
Copy a block of data from RAM into flash program
memory.
Copy a block of data from program flash memory to RAM.
The following table lists the User ISP/Virtual E
2
commands,
required parameters and return data, if applicable. The com-
mand entry point is used as an argument to the JSRB
instruction. Table 13 lists the Ram locations and Peripheral
Registers, used for User ISP and Virtual E
2
, and their ex-
pected contents. Please refer to the COP8 FLASH ISP User
Manual for additional information and programming ex-
amples on the use of User ISP and Virtual E
2
.
C
www.national.com
22
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