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參數(shù)資料
| 型號(hào)： | COP8SDR9 |
| 廠(chǎng)商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲(chǔ)器的帶32K存儲(chǔ)器，虛擬EEPROM和電壓過(guò)低復(fù)位的微控制器) |
| 中文描述： | 8位CMOS閃存為基礎(chǔ)的32K的內(nèi)存，虛擬EEPROM和欠壓（8位基于的CMOS閃速存儲(chǔ)器的帶32K的存儲(chǔ)器，微控制器虛擬的EEPROM和電壓過(guò)低復(fù)位的微控制器） |
| 文件頁(yè)數(shù)： | 17/68頁(yè) |
| 文件大小： | 714K |
| 代理商： | COP8SDR9 |
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4.0 Functional Description
(Continued)
above equation for load capacitance is strictly followed. If
these conditions are not met, the application may have
problems with startup of the low speed oscillator.
TABLE 4. Startup Times
CKI Frequency
10 MHz
3.33 MHz
1 MHz
455 kHz
32 kHz (low speed oscillator)
Startup Time
1–10 ms
3–10 ms
3–20 ms
10–30 ms
2–5 sec
4.8.2 Clock Doubler
This device contains a frequency doubler that doubles the
frequency of the oscillator selected to operate the main
microcontroller core. The details of how to select either the
high speed oscillator or low speed oscillator are described in,
Power Saving Features. When the high speed oscillator
connected to CKI operates at 10 MHz, the internal clock
frequency is 20 MHz, resulting in an instruction cycle time of
0.5 μs. When the 32 kHz oscillator connected to L0 and L1 is
selected, the internal clock frequency is 64 kHz, resulting in
an instruction cycle of 152.6 μs. The output of the clock
doubler is called MCLK and is referenced in many places
within this document.
4.9 CONTROL REGISTERS
CNTRL Register (Address X'00EE)
T1C3
T1C2
T1C1
T1C0
MSEL
IEDG
SL1
SL0
Bit 7
The Timer1 (T1) and MICROWIRE/PLUS control register
contains the following bits:
T1C3
Timer T1 mode control bit
T1C2
Timer T1 mode control bit
T1C1
Timer T1 mode control bit
T1C0
Timer
T1
Start/Stop
modes 1 and 2. T1 Underflow Interrupt
Pending Flag in timer mode 3
MSEL
Selects G5 and G4 as MICROWIRE/PLUS
signals SK and SO respectively
IEDG
External
interrupt
(0 = Rising edge, 1 = Falling edge)
SL1 & SL0
Select the MICROWIRE/PLUS clock divide
by (00 = 2, 01 = 4, 1x = 8)
Bit 0
control
in
timer
edge
polarity
select
PSW Register (Address X'00EF)
HC
C
T1PNDA
T1ENA
EXPND
BUSY
EXEN
GIE
Bit 7
The PSW register contains the following select bits:
HC
Half Carry Flag
C
Carry Flag
Bit 0
T1PNDA Timer T1 Interrupt Pending Flag (Autoreload
RA in mode 1, T1 Underflow in Mode 2, T1A
capture edge in mode 3)
T1ENA
Timer T1 Interrupt Enable for Timer Underflow
or T1A Input capture edge
EXPND
External interrupt pending
BUSY
MICROWIRE/PLUS busy shifting flag
EXEN
Enable external interrupt
GIE
Global interrupt enable (enables interrupts)
The Half-Carry flag is also affected by all the instructions that
affect the Carry flag. The SC (Set Carry) and R/C (Reset
Carry) instructions will respectively set or clear both the carry
flags. In addition to the SC and R/C instructions, ADC,
SUBC, RRC and RLC instructions affect the Carry and Half
Carry flags.
ICNTRL Register (Address X'00E8)
Unused
LPEN
T0PND
T0EN
μWPND
μWEN
T1PNDB
T1ENB
Bit 7
The ICNTRL register contains the following bits:
LPEN
L Port Interrupt Enable (Multi-Input Wake-up/
Interrupt)
T0PND
Timer T0 Interrupt pending
T0EN
Timer T0 Interrupt Enable (Bit 12 toggle)
μWPND
MICROWIRE/PLUS interrupt pending
μWEN
Enable MICROWIRE/PLUS interrupt
T1PNDB Timer T1 Interrupt Pending Flag for T1B cap-
ture edge
Bit 0
High Speed Oscillator
DS101389-15
Low Speed Oscillator
DS101389-16
FIGURE 12. Crystal Oscillator
C
www.national.com
17
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