參數(shù)資料
型號(hào)： COP8SDR9
廠商： National Semiconductor Corporation
英文描述： 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲(chǔ)器的帶32K存儲(chǔ)器，虛擬EEPROM和電壓過(guò)低復(fù)位的微控制器)
中文描述： 8位CMOS閃存為基礎(chǔ)的32K的內(nèi)存，虛擬EEPROM和欠壓（8位基于的CMOS閃速存儲(chǔ)器的帶32K的存儲(chǔ)器，微控制器虛擬的EEPROM和電壓過(guò)低復(fù)位的微控制器）
文件頁(yè)數(shù)： 16/68頁(yè)
文件大?。?/td> 714K
代理商： COP8SDR9
4.0 Functional Description
(Continued)
In Case 1, V
rises from 0V and the on-chip RESET is
undefined until the supply is greater than approximately
1.0V. At this time the brownout circuit becomes active and
holds the device in RESET. As the supply passes a level of
about 1.8V, a delay of about 3 ms (t
) is started and the Idle
Timer is preset to a value between 00F0 and 00FF (hex).
Once V
is greater than V
and t
d
has expired, the Idle
Timer is allowed to count down (t
id
).
Case 2 shows a subsequent dip in the supply voltage which
goes below the approximate 1.8V level. As V
drops below
V
, the internal RESET signal is asserted. When V
rises
back above the 1.8V level, t
is started. Since the power
supply rise time is longer for this case, t
has expired before
V
rises above V
bor
and t
id
starts immediately when V
CC
is
greater than V
bor
.
Case 3 shows a dip in the supply where V
drops below
V
bor
, but not below 1.8V. On-chip RESET is asserted when
V
CC
goes below V
bor
and t
id
starts as soon as the supply
goes back above V
bor
.
If the Brownout Reset feature is enabled, the internal reset
will not be turned off until the Idle Timer underflows. The
internal reset will perform the same functions as external
reset. The device is guaranteed to operate at the specified
frequency down to the specified brownout voltage. After the
underflow, the logic is designed such that no additional
internal resets occur as long as V
CC
remains above the
brownout voltage.
The device is relatively immune to short duration negative-
going V
transients (glitches). It is essential that good
filtering of V
be done to ensure that the brownout feature
works correctly. Power supply decoupling is vital even in
battery powered systems.
There are two optional brownout voltages. The part numbers
for the three versions of this device are:
COP8SBR9, V
bor
= low voltage range
COP8SCR9, V
bor
= high voltage range
COP8SDR9, BOR is disabled.
Refer to the device specifications for the actual V
bor
volt-
ages.
Under no circumstances should the RESET pin be allowed
to float. If the on-chip Brownout Reset feature is being used,
the RESET pin should be connected directly to V
. The
RESET input may also be connected to an external pull-up
resistor or to other external circuitry. The output of the brown-
out reset detector will always preset the Idle Timer to a value
between 00F0 and 00FF (240 to 256 t
C
). At this time, the
internal reset will be generated.
If the BOR feature is disabled, then no internal resets are
generated and the Idle Timer will power-up with an unknown
value. In this case, the external RESET must be used. When
BOR is disabled, this on-chip circuitry is disabled and draws
no DC current.
The contents of data registers and RAM are unknown fol-
lowing the on-chip reset.
4.8 OSCILLATOR CIRCUITS
The device has two crystal oscillators to facilitate low power
operation while maintaining throughput when required. Fur-
ther information on the use of the two oscillators is found in
Section 7.0 Power Saving Features. The low speed oscillator
utilizes the L0 and L1 port pins. References in the following
text to CKI will also apply to L0 and references to G7/CKO
will also apply to L1.
4.8.1 Oscillator
CKI is the clock input while G7/CKO is the clock generator
output to the crystal. An on-chip bias resistor connected
between CKI and CKO is provided to reduce system part
count. The value of the resistor is in the range of 0.5M to 2M
(typically 1.0M). Table 3 shows the component values re-
quired for various standard crystal values. Resistor R2 is
on-chip, for the high speed oscillator, and is shown for
reference. Figure 12 shows the crystal oscillator connection
diagram. A ceramic resonator of the required frequency may
be used in place of a crystal if the accuracy requirements are
not quite as strict.
TABLE 3. Crystal Oscillator Configuration,
T
A
= 25C, V
CC
= 5V
R1 (k
)
R2 (M
)
C1 (pF)
C2 (pF)
CKI Freq.
(MHz)
10
5
1
0.455
32.768
kHz
*
0
0
0
On Chip
On Chip
On Chip
On Chip
20
18
18
18
18
18–36
100
18–36
100–156
5.6
0
**
**
*
Applies to connection to low speed oscillator on port pins L0 and L1 only.
**
See Note below.
The crystal and other oscillator components should be
placed in close proximity to the CKI and CKO pins to mini-
mize printed circuit trace length.
The values for the external capacitors should be chosen to
obtain the manufacturer’s specified load capacitance for the
crystal when combined with the parasitic capacitance of the
trace, socket, and package (which can vary from 0 to 8 pF).
The guideline in choosing these capacitors is:
Manufacturer’s specified load cap = (C
1
* C
2
) / (C
1
+ C
2
) +
C
parasitic
C
can be trimmed to obtain the desired frequency. C
2
should be less than or equal to C
1
.
Note
: The low power design of the low speed oscillator
makes it extremely sensitive to board layout and load ca-
pacitance. The user should place the crystal and load ca-
pacitors within 1cm. of the device and must ensure that the
DS101389-14
FIGURE 11. Reset Circuit Using Power-On Reset
C
www.national.com
16
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