參數資料
型號: COP8SDR9
廠商: National Semiconductor Corporation
英文描述: 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲器的帶32K存儲器,虛擬EEPROM和電壓過低復位的微控制器)
中文描述: 8位CMOS閃存為基礎的32K的內存,虛擬EEPROM和欠壓(8位基于的CMOS閃速存儲器的帶32K的存儲器,微控制器虛擬的EEPROM和電壓過低復位的微控制器)
文件頁數: 11/68頁
文件大?。?/td> 714K
代理商: COP8SDR9
3.0 Pin Descriptions
(Continued)
Port L is an 8-bit I/O port. All L-pins have Schmitt triggers on
the inputs.
Port L supports the Multi-Input Wake Up feature on all eight
pins. Port L has the following alternate pin functions:
L7 Multi-input Walk-up or T3B (Timer T3B Input)
L6 Multi-input Walk-up or T3A (Timer T3A Input)
L5 Multi-input Walk-up or T2B (Timer T2B Input)
L4 Multi-input Walk-up or T2A (Timer T2A Input)
L3 Multi-input Walk-up and/or RDX (USART Receive)
L2 Multi-input Walk-up or TDX (USART Transmit)
L1 Multi-input Walk-up and/or CKX (USART Clock) (Low
Speed Oscillator Output)
L0 Multi-input Walk-up (Low Speed Oscillator Input)
Port D is an 8-bit output port that is preset high when RESET
goes low. The user can tie two or more D port outputs
(except D2) together in order to get a higher drive.
Note: Care must be exercised with the D2 pin operation. At
RESET, the external loads on this pin must ensure that the
output voltages stay above 0.7 V
CC
to prevent the chip from
entering special modes. Also keep the external loading on
D2 to less than 1000 pF.
3.1 EMULATION CONNECTION
Connection to the emulation system is made via a 2 x 7
connector which interrupts the continuity of the RESET, G0,
G1, G2 and G3 signals between the COP8 device and the
rest of the target system (as shown in Figure 6). This con-
nector can be designed into the production pc board and can
be replaced by jumpers or signal traces when emulation is
no longer necessary. The emulator will replicate all functions
of G0 - G3 and RESET. For proper operation, no connection
should be made on the device side of the emulator
connector.
DS101389-6
FIGURE 3. I/O Port Configurations
DS101389-7
FIGURE 4. I/O Port Configurations—Output Mode
DS101389-8
FIGURE 5. I/O Port Configurations—Input Mode
DS101389-9
FIGURE 6. Emulation Connection
C
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