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參數(shù)資料
| 型號： | COP8SDR9 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout(8位基于CMOS 閃速存儲器的帶32K存儲器，虛擬EEPROM和電壓過低復(fù)位的微控制器) |
| 中文描述： | 8位CMOS閃存為基礎(chǔ)的32K的內(nèi)存，虛擬EEPROM和欠壓（8位基于的CMOS閃速存儲器的帶32K的存儲器，微控制器虛擬的EEPROM和電壓過低復(fù)位的微控制器） |
| 文件頁數(shù)： | 18/68頁 |
| 文件大?。?/td> | 714K |
| 代理商： | COP8SDR9 |
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4.0 Functional Description
(Continued)
T1ENB
Timer T1 Interrupt Enable for T1B Input capture
edge
T2CNTRL Register (Address X'00C6)
T2C3
T2C2
T2C1
T2C0
T2PNDA
T2ENA
T2PNDB
T2ENB
Bit 7
The T2CNTRL register contains the following bits:
T2C3
Timer T2 mode control bit
T2C2
Timer T2 mode control bit
T2C1
Timer T2 mode control bit
T2C0
Timer
T2
modes 1 and 2, Timer T2 Underflow Interrupt
Pending Flag in timer mode 3
T2PNDA
Timer T2 Interrupt Pending Flag (Autoreload
RA in mode 1, T2 Underflow in mode 2, T2A
capture edge in mode 3)
T2ENA
Timer T2 Interrupt Enable for Timer Underflow
or T2A Input capture edge
T2PNDB
Timer T2 Interrupt Pending Flag for T2B cap-
ture edge
T2ENB
Timer T2 Interrupt Enable for T2B Input cap-
ture edge
Bit 0
Start/Stop
control
in
timer
T3CNTRL Register (Address X'00B6)
T3C3
T3C2
T3C1
T3C0
T3PNDA
T3ENA
T3PNDB
T3ENB
Bit 7
The T3CNTRL register contains the following bits:
T3C3
Timer T3 mode control bit
T3C2
Timer T3 mode control bit
T3C1
Timer T3 mode control bit
T3C0
Timer
T3
modes 1 and 2, Timer T3 Underflow Interrupt
Pending Flag in timer mode 3
T3PNDA
Timer T3 Interrupt Pending Flag (Autoreload
RA in mode 1, T3 Underflow in mode 2, T3A
capture edge in mode 3)
T3ENA
Timer T3 Interrupt Enable for Timer Underflow
or T3A Input capture edge
T3PNDB
Timer T3 Interrupt Pending Flag for T3B cap-
ture edge
T3ENB
Timer T3 Interrupt Enable for T3B Input cap-
ture edge
Bit 0
Start/Stop
control
in
timer
HSTCR Register (Address X'00AF)
Reserved
T3HS
T2HS
Bit 7
Bit 0
The HSTCR register contains the following bits:
T3HS Places Timer T3 in High Speed Mode.
T2HS Places Timer T2 in High Speed Mode.
ITMR Register (Address X'00CF)
LSON
HSON
DCEN
CCKS
EL
RSVD
ITSEL2
ITSEL1
ITSEL0
Bit 7
The ITMR register contains the following bits:
LSON
Turns the low speed oscillator on or off.
HSON
Turns the high speed oscillator on or off.
Bit 0
DCEN
Selects the high speed oscillator or the low
speed oscillator as the Idle Timer Clock.
CCKSEL Selects the high speed oscillator or the low
speed oscillator as the primary CPU clock.
RSVD
This bit is reserved and must be 0.
ITSEL2
Idle Timer period select bit.
ITSEL1
Idle Timer period select bit.
ITSEL0
Idle Timer period select bit.
C
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| COP8SDR9HLQ7 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout |
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| COP8SDR9HVA7 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout |
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| COP8SDR9HVA8 63SN | 制造商:National Semiconductor 功能描述:MCU 8-bit COP8 CISC 32KB Flash 3.3V/5V 44-Pin PLCC Rail |
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