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參數(shù)資料
| 型號： | ARM60 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Low Power General Purpose 32-Bit RISC Microprocessor(低功耗通用32位精簡指令集微處理器) |
| 中文描述： | 低功耗通用32位RISC微處理器（低功耗通用32位精簡指令集微處理器） |
| 文件頁數(shù)： | 36/121頁 |
| 文件大?。?/td> | 1217K |
| 代理商： | ARM60 |
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P60ARM-B
32
4.5.2 Reserved bits
Only eleven bits of the PSR are defined in ARM60 (N,Z,C,V,I,F & M[4:0]); the remaining bits (= PSR[27:8,5])
are reserved for use in future versions of the processor. To ensure the maximum compatibility between
ARM60 programs and future processors, the following rules should be observed:
(1)
The reserved bits shall be preserved when changing the value in a PSR.
(2)
Programs shall not rely on specific values from the reserved bits when checking the PSR status,
since they may read as one or zero in future processors.
A read-modify-write strategy should therefore be used when altering the control bits of any PSR register;
this involves transferring the appropriate PSR register to a general register using the MRS instruction,
changing only the relevant bits and then transferring the modified value back to the PSR register using the
MSR instruction.
e.g. The following sequence performs a mode change:
MRS
BIC
ORR
MSR
R0,CPSR
R0,R0,#0x1F
R0,R0,#new_mode
CPSR,R0
; take a copy of the CPSR
; clear the mode bits
; select new mode
; write back the modified CPSR
When the aim is simply to change the condition code flags in a PSR, an immediate value can be written
directly to the flag bits without disturbing the control bits. e.g. The following instruction sets the N,Z,C &
V flags:
MSR
CPSR_flg,#0xF0000000 ; set all the flags regardless of
; their previous state (does not
; affect any control bits)
No attempt shall be made to write an 8 bit immediate value into the whole PSR since such an operation
cannot preserve the reserved bits.
4.5.3 Instruction Cycle Times
PSR Transfers take 1S incremental cycles, where S is as defined in section 5.1 Cycle types on page 65.
4.5.4 Assembler syntax
(1)
MRS - transfer PSR contents to a register
MRS{cond} Rd,<psr>
(2)
MSR - transfer register contents to PSR
MSR{cond} <psr>,Rm
(3)
MSR - transfer register contents to PSR flag bits only
MSR{cond} <psrf>,Rm
The most significant four bits of the register contents are written to the N,Z,C & V flags respectively.
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