參數(shù)資料
型號(hào)： AM79C850KCW
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 微控制器/微處理器
英文描述： SUPERNET-R 3
中文描述： 1 CHANNEL(S), 100M bps, FDDI CONTROLLER, PQFP208
封裝： PLASTIC, QFP-208
文件頁(yè)數(shù)： 60/97頁(yè)
文件大?。?/td> 358K
代理商： AM79C850KCW
AMD
P R E L I M I N A R Y
60
SUPERNET 3
Node Processor Register Address Map
The registers accessible through the node processor
interface are addressed as shown in the table below.
Register
Mnemonic
Address
Register Name
AFCMD
“b0”
Address Filter Command
Register
AFSTAT
“b2”
Address Filter Status
Register
AFBIST
“b4”
Address Filter BIST
Signature
AFCOMP2
“b6”
Address Filter Comparand 2
Register
AFCOMP1
“b8”
Address Filter Comparand 1
Register
AFCOMP0
“ba”
Address Filter Comparand 0
Register
AFMASK2
“bc”
Address Filter Mask 2
Register
AFMASK1
“be”
Address Filter Mask 1
Register
AFMASK0
“c0”
Address Filter Mask 0
Register
AFPERS
“c2”
Address Filter Personality
Register
MAC Interface
The AF interfaces to the FDDI MAC through the receive
data bus, MAC status and control signals, and the AF
match output signals. As described above, the AF loads
addresses to be compared as they are received from the
network. The MAC signals the AF at the beginning of the
source and/or destination address through the MAC
address state machine’s state variable. The AF uses
this state variable to load six consecutive bytes into the
MAC comparand register and perform the comparison
of the address against the contents of the CAM when the
complete address is in the register. The AF signals the
MAC with the result of the comparison and if the
comparison is exact (as determined by the appropriate
bit in the personality byte). The AF will decode the
Frame Control (FC) field of the received frame and will
not participate in the address match if bit 6 of the FC is
zero (indicating a short address frame).
MAC Comparand Register
This is a 48-bit register that is loaded from the MAC
receive data bus. The data arrives one byte at a time and
is loaded byte serially into the register. An internal
multiplexer is driven by the state variable of the MAC
address state machine. Once started, the state machine
causes the register to load six consecutive bytes from
the receive data bus into the comparand register. Upon
completion of the loading of the register, the contents
will be transferred to the MAC comparand shadow
register for comparison with the contents of the CAM.
MAC Comparand Shadow Register
The MAC comparand shadow register receives the
contents of the MAC comparand register once that
register has been loaded with six bytes of address
information from the MAC receive data bus. This allows
the MAC comparand register to immediately begin
loading a subsequent address from the receive data bus
without interfering with the comparison function of the
AF. Once data has been transferred into the MAC
comparand shadow register, the contents of the shadow
register are compared with the contents of the CAM.
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