參數(shù)資料
型號： AK4343
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： Stereo DAC with HP/RCV/SPK-AMP
中文描述： 立體聲DAC惠普/垃圾車/胰腎聯(lián)合移植腺苷
文件頁數(shù)： 5/98頁
文件大小： 851K
代理商： AK4343
ASAHI KASEI
[AK4343]
MS0478-E-01
2006/10
- 5 -
PIN/FUNCTION
No. Pin Name
I/O
Function
1
TEST1
-
Test 1 Pin
This pin should be left floating.
Common Voltage Output Pin, 0.45 x AVDD
Bias voltage of DAC outputs.
Analog Ground Pin
Analog Power Supply Pin
Output Pin for Loop Filter of PLL Circuit (AIN3 bit = “0”: PLL is available)
This pin should be connected to AVSS with one resistor and capacitor in series.
Rch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
Control Mode Select Pin
“H”: I
2
C Bus, “L”: 3-wire Serial
Power-Down Mode Pin
“H”: Power-up, “L”: Power-down, reset and initializes the control register.
Chip Select Pin (I2C pin = “L”: 3-wire Serial Mode)
Chip Address 1 Select Pin (I2C pin = “H”: I
2
C Bus Mode)
Control Data Clock Pin (I2C pin = “L”: 3-wire Serial Mode)
Control Data Clock Pin (I2C pin = “H”: I
2
C Bus Mode)
Control Data Input Pin (I2C pin = “L”: 3-wire Serial Mode)
Control Data Input Pin (I2C pin = “H”: I
2
C Bus Mode)
Audio Serial Data Input Pin
Test 2 Pin
This pin should be left floating.
Input / Output Channel Clock Pin
Audio Serial Data Clock Pin
Digital Power Supply Pin
Digital Ground Pin
External Master Clock Input Pin
Master Clock Output Pin
Speaker Amp Negative Output Pin
Speaker Amp Positive Output Pin
Headphone & Speaker Amp Power Supply Pin
Headphone & Speaker Amp Ground Pin
Rch Headphone-Amp Output Pin
Lch Headphone-Amp Output Pin
Mute Time Constant Control Pin
Connected to HVSS pin with a capacitor for mute time constant.
Rch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
Receiver-Amp Negative Output Pin (RCV bit = “1”: BTL output)
Lch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
Receiver-Amp Positive Output Pin (RCV bit = “1”: BTL output)
Mono Signal Input Pin (AIN3 bit = “0”: PLL is available)
Lch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
Rch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
Rch Negative Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
Lch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
Rch Positive Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
Lch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
Lch Negative Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Rch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
Lch Positive Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Note 1. All input pins except analog input pins (MIN/LIN3, LIN1, RIN1, LIN2, RIN2, RIN3) should not be left floating.
Note 2. AVDD or AVSS voltage should be input to I2C pin.
2
VCOM
O
3
4
AVSS
AVDD
-
-
VCOC
O
5
RIN3
I
6
I2C
I
7
PDN
I
CSN
CAD0
CCLK
SCL
CDTI
SDA
SDTI
I
I
I
I
I
8
9
10
I/O
I
11
12
TEST2
-
13
14
15
16
17
18
19
20
21
22
23
24
LRCK
BICK
DVDD
DVSS
MCKI
MCKO
SPN
SPP
HVDD
HVSS
HPR
HPL
I/O
I/O
-
-
I
O
O
O
-
-
O
O
25
MUTET
O
ROUT
RCN
LOUT
RCP
MIN
LIN3
RIN2
IN2
LIN2
IN2+
LIN1
IN1
RIN1
IN1+
O
O
O
O
I
I
I
I
I
I
I
I
I
I
26
27
28
29
30
31
32
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