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參數(shù)資料
| 型號： | ADV7321KSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 61/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VID ENC 6-12BIT DAC'S 64LQFP |
| 標準包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應用： | EVD，DVD，SD/PS/HDTV |
| 電壓 - 電源，模擬： | 2.5V |
| 電壓 - 電源，數(shù)字： | 2.5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
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ADV7320/ADV7321
Rev. A | Page 64 of 88
Analog Signal Interconnect
Locate the ADV7320/ADV7321 as close as possible to the output
connectors to minimize noise pickup and reflections due to
impedance mismatch.
For optimum performance, each analog output should be
source- and load-terminated, as shown in Figure 91. The
termination resistors should be as close as possible to the
ADV7320/ADV7321 to minimize reflections.
For optimum performance, it is recommended that all decoupling
and external components relating to the ADV7320/ADV7321 are
located on the same side of the PCB and as close as possible to
the ADV7320/ADV7321. Unused inputs should be tied to ground.
5k
Ω
VDD_IO
5k
Ω
VDD_IO
COMP1, 2
45
VAA
41
VDD VDD_IO
1
ADV7320/
ADV7321
I2C
19
50
49
48
23
CLKIN_B
63
24
25
33
CLKIN_A
32
EXT_LF
34
UNUSED
INPUTS
SHOULD BE
GROUNDED
C0–C9
S0–S9
Y0–Y9
VAA
4.7
μF
+
4.7k
Ω
820pF
3.9nF
VAA
GND_ IO
64
AGND
40
DGND
11, 57
I2C BUS
10nF
0.1
μF
10nF
0.1
μF
10, 56
VDD_IO
VDD
10nF
1
μF
VAA
+
VAA
0.1
μF
POWER SUPPLY DECOUPLING
FOR EACH POWER SUPPLY GROUP
36
VAA
0.1
μF
DAC D 39
DAC E 38
DAC F 37
DAC A 44
DAC B 43
DAC C 42
VREF 46
1.1k
Ω
VAA
RECOMMENDED EXTERNAL
AD1580 FOR OPTIMUM
PERFORMANCE
5k
Ω
VDD_IO
SCLK 22
100
Ω
680
Ω
SDA 21
ALSB 20
RSET1
RSET2
47
100
Ω
3040
Ω
SELECTION HERE
DETERMINES
DEVICE ADDRESS
35
3040
Ω
5k
Ω
VDD_IO
S_HSYNC
S_VSYNC
S_BLANK
P_HSYNC
P_VSYNC
P_BLANK
RESET
05067-091
100nF
ALL COMPONENTS IN DASHED BOXES MUST BE LOCATED ON THE SAME SIDE
OF THE PCB AS THE ADV7320/ADV7321 AND AS CLOSE AS POSSIBLE TO THE ADV7320/ADV7321.
300
Ω
300
Ω
300
Ω
300
Ω
300
Ω
300
Ω
Figure 91. ADV7320/ADV7321 Circuit Layout
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