
ADV7320/ADV7321
Rev. A | Page 6 of 88
SPECIFICATIONS
VAA = 2.375 V to 2.625 V, VDD = 2.375 V to 2.625 V, VDD_IO = 2.375 V to 3.6 V, VREF = 1.235 V, RSET = 3040 Ω, RLOAD = 300 Ω. All
specifications TMIN to TMAX (0°C to 70°C), unless otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions
Resolution
12
Bits
Integral Nonlinearity
1.5
LSB
Differential Nonlinearity,
2 +ve
0.25
LSB
Differential Nonlinearity
,2 ve
1.5
LSB
DIGITAL OUTPUTS
Output Low Voltage, VOL
V
ISINK = 3.2 mA
Output High Voltage, VOH
V
ISOURCE = 400 μA
Three-State Leakage Current
±1.0
μA
VIN = 0.4 V, 2.4 V
Three-State Output Capacitance
2
pF
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
2
V
Input Low Voltage, VIL
0.8
V
Input Leakage Current
10
μA
VIN = 2.4 V
Input Capacitance, CIN
2
pF
ANALOG OUTPUTS
Full-Scale Output Current
4.1
4.33
4.6
mA
Output Current Range
4.1
4.33
4.6
mA
DAC-to-DAC Matching
1.0
%
Output Compliance Range, VOC
0
1.0
1.4
V
Output Capacitance, COUT
7
pF
VOLTAGE REFERENCE
Internal Reference Range, VREF
1.15
1.235
1.3
V
External Reference Range, VREF
1.15
1.235
1.3
V
±10
μA
POWER REQUIREMENTS
Normal Power Mode
137
mA
SD only (16×)
78
mA
PS only (8×)
73
mA
HDTV only (2×)
140
mA
SD (16×, 10 bit) + PS (8×, 20 bit)
IDD_IO
1.0
mA
37
45
mA
Sleep Mode
IDD
80
μA
IAA
7
μA
IDD_IO
250
μA
POWER SUPPLY REJECTION RATIO
0.01
%/%
1 Oversampling disabled. Static DAC performance improves with increased oversampling ratios.
2 DNL measures the deviation of the actual DAC output voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal step value; for ve DNL, the
actual step value lies below the ideal step value.
3 For values in brackets, VDD_IO = 2.375 V to 2.75 V.
4 External current required to overdrive internal VREF.
5 IDD, the circuit current, is the continuous current required to drive the digital core.
6 Guaranteed maximum by characterization.
7 All DACs on.
8 IAA is the total current required to supply all DACs, including the VREF circuitry and the PLL circuitry.