參數(shù)資料
型號(hào)： ADV7321KSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 53/88頁(yè)
文件大?。?/td> 0K
描述： IC VID ENC 6-12BIT DAC'S 64LQFP
標(biāo)準(zhǔn)包裝： 1
類型： 視頻編碼器
應(yīng)用： EVD，DVD，SD/PS/HDTV
電壓 - 電源，模擬： 2.5V
電壓 - 電源，數(shù)字： 2.5V
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
ADV7320/ADV7321
Rev. A | Page 57 of 88
Adaptive Filter Control Application
Figure 75 and Figure 76 show how a typical signal is processed
by the adaptive filter control block in Mode A.
05067-075
Figure 75. Input Signal to Adaptive Filter Control
05067-076
Figure 76. Output Signal with Adaptive Filter Control (Mode A)
The register settings in Table 35 were used to obtain the results
shown in Figure 76 (to remove the ringing on the Y signal). Input
data was generated by an external signal source.
Table 35. Register Settings for Figure 76
Address
Register Setting
0x00
0xFC
0x01
0x38
0x02
0x20
0x10
0x00
0x11
0x81
0x15
0x80
0x20
0x00
0x38
0xAC
0x39
0x9A
0x3A
0x88
0x3B
0x28
0x3C
0x3F
0x3D
0x64
When changing the adaptive filter mode to Mode B
[Address 0x15, Bit 6], the output shown in Figure 77 can
be obtained from the input signal shown in Figure 75.
05067-077
Figure 77. Output Signal with Adaptive Filter Control (Mode B)
SD DIGITAL NOISE REDUCTION
[Subaddresses 0x63, 0x64, 0x65]
DNR is applied to the Y data only. A filter block selects the high
frequency, low amplitude components of the incoming signal
(DNR input select). The absolute value of the filter output is
compared to a programmable threshold value (DNR threshold
control). There are two DNR modes available: DNR mode and
DNR sharpness mode.
In DNR mode, if the absolute value of the filter output is less
than the threshold, it is assumed to be noise. A programmable
amount (coring gain border, coring gain data) of this noise
signal is subtracted from the original signal. Likewise, in DNR
sharpness mode, if the absolute value of the filter output is less
than the programmed threshold, it is assumed to be noise. If the
level exceeds the threshold and is identified as a valid signal, a
fraction of the signal (coring gain border, coring gain data) is
added to the original signal to boost high frequency components
and sharpen the video image.
In MPEG systems, it is common to process the video information
in blocks of 8 pixels × 8 pixels for MPEG2 systems, or 16 pixels ×
16 pixels for MPEG1 systems (block size control). DNR can be
applied to the resulting block transition areas that are known to
contain noise. Generally, the block transition area contains two
pixels. It is possible to define this area to contain four pixels
(border area).
It is also possible to compensate for variable block positioning
or differences in YCrCb pixel timing with the use of the DNR
block offset.
The digital noise reduction registers are three 8-bit registers.
They are used to control the DNR processing.
相關(guān)PDF資料
PDF描述
ADV7343BSTZ IC ENCODER VIDEO W/DAC 64-LQFP
ADV7391BCPZ IC ENCODER VIDEO W/DAC 32LFCSP
ADV7511KSTZ IC XMITTER HDMI 12BIT 100LQFP
ADV7511WBSWZ IC XMITTER HDMI AUTO 64LQFP
ADV7622BSTZ-RL IC TXRX HDMI 4:1 144LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7322 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 11-Bit HDTV Video Encoder
ADV73225709 制造商:LG Corporation 功能描述:Frame Assembly
ADV73225710 制造商:LG Corporation 功能描述:Frame Assembly
ADV73225718 制造商:LG Corporation 功能描述:Frame Assembly
ADV73225719 制造商:LG Corporation 功能描述:Frame Assembly
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*