參數(shù)資料
型號: ADC1443D200HD
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual channel 14-bit ADC; 200 Msps; JESD204B-compliant CGVxpress? serial outputs
封裝: ADC1443D200HD/C1<SOT935-2 (HLQFN56R)|<<http://www.nxp.com/packages/SOT935-2.html<1<Always Pb-free,;
文件頁數(shù): 31/50頁
文件大?。?/td> 408K
代理商: ADC1443D200HD
ADC1443D_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 28 September 2011
31 of 50
NXP Semiconductors
ADC1443D series
Dual 14-bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs
11.5 Serial Peripheral Interface (SPI)
11.5.1
Register description
The ADC1443D serial interface is a synchronous serial communications port, which
allows easy interfacing with many commonly used microprocessors. It provides access to
the registers controlling the operation of the chip.
The register bits are either global or local functions:
A global function operates over the full IC behavior. A local function operates on one
or several previously selected channels only. If a channel is selected, the next WRITE
command in the local registers applies to the selected channel. The WRITE command
has no impact on channels that are not selected. This makes it possible to apply
different configurations on each channel by first selecting a specific channel and then
all the related settings.
Select only one channel during a READ operation of the local registers. If several
channels are selected, the READ operation occurs on the channel A.
Programming all registers at the same time is required:
The IC allows the storage of a set of settings for the addresses 06h to 23h, which
enables the configuration of all registers simultaneously by setting bit TRANSFER to
HIGH (see
Table 32
). This bit is autoclearing. This function can be disabled using SPI
(bit TRANS_DIS in
Table 32
). The registers are then updated at each WRITE
operation.
The transfer function does not apply to a READ operation.
The SPI interface is configured as a 3-wire type: pin SDIO is the bidirectional pin, pin
SCLK is the serial clock input and SCS_N is the chip select pin.
A LOW level on pin SCS_N initiates each READ/WRITE operation. A minimum of 3 bytes
is transmitted (two instruction bytes and at least 1 DATA byte; see
Table 18
).
Table 17.
Bit:
Description
Bit R/W indicates whether it is a READ (when HIGH) or a WRITE (when LOW)
operation.
Bits W1 and W0 indicate the number of bytes to be transferred after both instruction
bytes (see
Table 18
).
Table 18.
W1
0
0
1
1
Instruction bytes for the SPI
7 (MSB)
R/W
A7
6
W1
A6
5
W0
A5
4
A12
A4
3
A11
A3
2
A10
A2
1
A9
A1
0 (LSB)
A8
A0
Number of data bytes transferred
W0
0
1
0
1
Number of bytes transferred
1 byte
2 bytes
3 bytes
4 or more bytes
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