
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 23: LAN100 — Ethernet Media Access Controller
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
23-18
15:0
BlockZone
R/W
0
Time margin for a transmit time-stamp during which no new
non-real-time packets will be transmitted to free up the Ethernet for
upcoming real-time transmissions.
Offset 0x07 2148
Transmit Quality Of Service Time-out Register (QoSTimeout)
The QoSTimeout Register is only used in QoS mode, i.e., when the QoSEnable bit of the Command register is set.
31:16
-
Unused
15:0
QoSTimeout
R/W
Species the maximum number of clock cycles a low-priority
transmission must wait for transmission. If the time-out counter
expires, the low-priority transmission will get the highest priority.
QoSTimeout is specied in units of 64 times the transmit clock
cycle.
Offset 0x07 2158
Transmit Status Vector 0 Register (TSV0)
The Transmit Status Vector registers TSV0 and TSV1 store the most recent transmit status returned by the MII Interface.
Since the status vector consists of more than 4 bytes, status is distributed over two registers: TSV0 and TSV1.
31
VLAN
RO
Set if the frame’s length/type eld contained 0x8100, which is the
VLAN protocol identier.
30
Backpressure
RO
Set if carrier-sense method back pressure was previously applied.
29
PAUSE
RO
Set if the frame was a control frame with a valid PAUSE opcode.
28
Control frame
RO
Set if the frame was a control frame.
27-12
Total bytes
RO
The total number of bytes transferred, including collided attempts.
11
Underrun
RO
Set if the host side caused a buffer underrun condition.
10
Giant
RO
Set if the byte count in the frame was greater than [15:0].
9
LateCollision
RO
Set if a collision occurred beyond the collision window (512 bit
times).
8
MaximumCollision
RO
If set, the packet was aborted because it exceeded the maximum
allowed number of collisions.
7
ExcessiveDefer
RO
If set, the packet was deferred in excess of 6071 nibble times in
100Mb/s, or 24287 bit times in 10Mb/s mode.
6
PacketDefer
RO
If set, the packet was deferred for at least one attempt, but less then
an excessive defer.
5
Broadcast
RO
Set if the packet’s destination was a broadcast address.
4
Multicast
RO
Set if the packet’s destination was a multicast address.
3
Done
RO
Indicates that the transmission of the packet was completed.
2
LengthOutOfRange
RO
Indicates that the frame type/length eld was larger than 1500
bytes.
1
LengthCheckError
RO
Indicates that the frame length eld does not match the actual
number of data items, and is not a type eld.
0
CRCError
RO
Set if the attached CRC in the packet did not match the CRC
generated internally.
Offset 0x07 215C
Transmit Status Vector 0 Register (TSV1)
The Transmit Status Vector registers TSV0 and TSV1 store the most recent transmit status returned by the MII Interface.
Since the status vector consists of more than 4 bytes, status is distributed over two registers: TSV0 and TSV1.
31:20
-
Table 2: LAN100 Registers …Continued
Bit
Symbol
Acces
s
Value
Description