
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 20: 2D Drawing Engine
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
20-19
This register is used to load the starting linear pixel address for a vector or the
destination linear address for a BLT operation.
It is interpreted as a byte address and must be loaded with a pixel aligned address.
Note that loading the DstXY register actually causes this register to be loaded with
the proper linear pixel address.
This register may not be used to specify the destination address for a command that
utilizes patterns.
This register holds the unsigned offset between adjacent source scanlines for screen-
to-screen BLTs. Under many circumstances, this register will be initialized to the
screen pitch and then changed only for special effects.
This 14-bit register is interpreted as an unsigned byte value. It is used during a BLT to
step from scanline to scanline. It is also used to convert a SrcXY address to a
SrcLinear address according to the following formula:
SrcLinear = SrcXY.Y * SrcStride + SrcXY.X (1) + SrcAddrBase
(1) This value is adjusted for pixel color depth.
There are no restrictions on this register except that the lower three bits are always
interpreted as 0, regardless of the value written. When reading the contents of this
register, the lower three bits will be read back as 0. This implies the source stride
must be a multiple of 8 bytes.
As this is an unsigned register, it is always interpreted as a positive value. The
direction in which a source is traversed is controlled by the BLT direction eld in the
BltCtl register.
This register may be useful for BLTing bitmaps stored in off screen memory in a 1D
format to the screen. It is unchanged by any drawing operations.
Table 15: Source Stride
Bit
Symbol
Acces
s
Value
Description
Offset 0x04 F414
Source Stride
31:14
Reserved
13:0
SrcStr
R/W
0x3FF8
Used to load the starting linear pixel address for a vector or the
destination linear address for a BLT operation. Bits 2:0 must be set
to 0.
Table 16: Destination Stride
Bit
Symbol
Acces
s
Value
Description
Offset 0x04 F418
Destination Stride
31:14
Reserved
13:8
DstStr[13:8]
R/W
0
Hold the offset between adjacent scanlines for BLTs and vectors.
Bits 2:0 must be set to 0.
7:0
DstStr[7:0]
R/W
0