
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 2: Overview
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
2-12
6.
MPEG Decoding
The TM3260 processes the audio, video and the stream de-multiplexing via software.
The Variable Length decoding as well as the authentication and the de-scrambling
are supported by two coprocessors.
6.1 VLD
The PNX15xx Series VLD is an MPEG-1 and MPEG-2 parser that writes to memory
a separate data structure for macro block header and coefcient information. It is
capable of sustaining an ATSC (High Denition) bitrate. It off-loads the CPU in
applications involving MPEG-2 decoding or transcoding. Low to medium bitrate VLD
decoding, as well as VLC encoding may be done by the TM3260 CPU. MPEG-2 HD
decoding by the CPU is not supported due to CPU and system limitations.
6.2 DVD De-scrambler
The DVD-CSS module is provided to allow integrated DVD playback capability.
It provides authentication and de-scrambling for DVDs. A DVD drive can be attached
to the integrated medium-bandwidth IDE controller, and provides its data either
across the IDE interface or across a multi bit serial interface to the GPIO pins. The
resulting system memory scrambled program stream is de-scrambled by invoking a
memory to memory operation on the DVD-CSS module. The ‘cleartext’ program
stream is then de-multiplexed by software on the TM3260.
More detailed Information available on (legal) request
7.
Image Processing
7.1 Pixel Format
The on-chip hardware image processing modules all use the same ‘native’ pixel
formats, as shown in
Table 5. This ensures that image data produced by one module
can be read by another module.
A limited number of native pixel formats are supported by all image subsystems,
as appropriate.
The Memory Based Scaler supports conversion from arbitrary pixel formats to
any native format during the anti-icker ltering operation. This operation is
usually required on graphics images anyway, hence no extra passes are
introduced.
Hardware subsystems support all native pixel formats in both little-endian and
big-endian system operation.
Software always sees the same component layout for a native pixel format unit,
whether it is running in little-endian or big-endian mode. i.e. for a given native
format, R, G, B (or Y,U,V) and alpha are always in the same place.