
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 25: I2C Interface
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
25-17
Table 7: IIC Registers
Bit
Acces
s
Value
Symbol
Description
Offset 0x04 5010
I2C STOP REGISTER
31:1
-
Unused
Ignore upon read. Write as zeroes.
0
R/W
0
STO
Set and read STO ag
Writes:
In master mode, set STO ag to indicate a STOP has been
requested. Then generate a STOP condition on I2C bus. When the
STOP condition is detected on the bus, the IIC module hardware
clears the STO flag.
In slave mode, set STO ag to indicate a STOP has been
requested. No STOP condition is transmitted to the I2C bus.
However, the IIC module hardware behaves as if a STOP condition
has been received and switches to the defined “not addressed”
slave receiver mode. The STO flag is immediately cleared by the
hardware so that software can never see it set.
Reads:
View the STO ag to see if a STOP has been requested. STO ag
can also be viewed by reading the STO bit of IIC_CONTROL.
See STO bit of IIC_CONTROL register for more information
Offset 0x04 5014
I2C PD REGISTER
31:3
-
Unused
Ignore upon read. Write as zeroes.
2
R/W
0
PD
This bit synchronously resets the IIC clock domain except for the
MMIO registers.
0 = Don’t reset IIC clock domain.
1 = Reset IIC clock domain.
Note: Do not reset the IIC clock domain until the IIC module is
disabled using bit 6 of the IIC Control register.
1:0
-
Unused
Ignore upon read. Write as zeroes.
Offset 0x04 5018
I2C BUS SET REGISTER
31:2
-
Unused
Ignore upon read. Write as zeroes.
1
W
0
SET_SCL_LOW
Pull I2C SCL bus signal to logic one or zero:
1 = Pulls SCL signal to logic zero.
0 = SCL signal is not pulled to logic zero.
0
W
0
SET_SDA_LOW
Pull I2C SDA bus signal to logic one or zero:
1 = Pulls SDA signal to logic zero.
0 = SDA signal is not pulled to logic zero.
Offset 0x04 501C
I2C BUS OBSERVATION REGISTER
31:2
-
Unused
Ignore upon read. Write as zeroes.
1
R
0
OBSERVE_SCL
Observe I2C SCL bus signal:
1 = SCL signal is at logic one.
0 = SCL signal is at logic zero.
0
R
0
OBSERVE_SDA
Observe I2C SDA bus signal
1 = SDA signal is at logic one.
0 = SDA signal is at logic zero.
Offset 0x04 5020—9FDC Reserved