
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 8: General Purpose Input Output Pins
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
8-39
5
DATA_VALID_5
R
0
Data in TSU 5 is ready to be read.
4
DATA_VALID_4
R
0
Data in TSU 4 is ready to be read.
3
DATA_VALID_3
R
0
Data in TSU 3 is ready to be read.
2
DATA_VALID_2
R
0
Data in TSU 2 is ready to be read.
1
DATA_VALID_1
R
0
Data in TSU 1 is ready to be read.
0
DATA_VALID_0
R
0
Data in TSU 0 is ready to be read.
Offset 0x10,4FE4
INT_ENABLE4
31:24
Unused
-
23
INT_OE_11_EN
R/W
0
Internal overrun interrupt enable register for TSU 11
0 - Interrupt disabled
1 - Interrupt enabled
22
INT_OE_10_EN
R/W
0
Internal overrun interrupt enable register for TSU 10
0 - Interrupt disabled
1 - Interrupt enabled
21
INT_OE_9_EN
R/W
0
Internal overrun interrupt enable register for TSU 9
0 - Interrupt disabled
1 - Interrupt enabled
20
INT_OE_8_EN
R/W
0
Internal overrun interrupt enable register for TSU 8
0 - Interrupt disabled
1 - Interrupt enabled
19
INT_OE_7_EN
R/W
0
Internal overrun interrupt enable register for TSU 7
0 - Interrupt disabled
1 - Interrupt enabled
18
INT_OE_6_EN
R/W
0
Internal overrun interrupt enable register for TSU 6
0 - Interrupt disabled
1 - Interrupt enabled
17
INT_OE_5_EN
R/W
0
Internal overrun interrupt enable register for TSU 5
0 - Interrupt disabled
1 - Interrupt enabled
16
INT_OE_4_EN
R/W
0
Internal overrun interrupt enable register for TSU 4
0 - Interrupt disabled
1 - Interrupt enabled
15
INT_OE_3_EN
R/W
0
Internal overrun interrupt enable register for TSU 3
0 - Interrupt disabled
1 - Interrupt enabled
14
INT_OE_2_EN
R/W
0
Internal overrun interrupt enable register for TSU 2
0 - Interrupt disabled
1 - Interrupt enabled
13
INT_OE_1_EN
R/W
0
Internal overrun interrupt enable register for TSU 1
0 - Interrupt disabled
1 - Interrupt enabled
Table 18: GPIO Module Status Register for all 12 Timestamp Units
Bit
Symbol
Acces
s
Value
Description