
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 6: Boot Module
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
6-15
4.2 The Boot Commands and The Endian Mode
When writing to an MMIO register address, there is no endian mode issue. The msbit
of the word ‘V’ (
Table 2) end up as the msbit of the MMIO register. When writing to an
SDRAM address there is an endian mode issue. Depending on the current endian
In little-endian mode, the MSB of ‘V’ (or the last read EEPROM byte of the word),
end up in memory byte address ‘A+3’ and LSB (or rst read EEPROM byte), end
up at the byte address ‘a(chǎn)’.
In big-endian mode, the MSB of ‘V’ (or last read EEPROM byte), end up at the
byte address ‘A’ and the LSB (or rst read EEPROM byte), end up at the byte
address ‘A+3’.
4.3 Details on I2C Operation
To retrieve the boot script, the Boot module performs the following I2C transactions:
START, 10100000, wait-for-ack, 00000000, wait-for-ack, 00000000, wait-for-ack,
STOP
START, 10100001, wait-for-ack, <accept data byte, send ACK or STOP if done>.
The interpretation of this sequence by 2048 bytes or smaller EEPROMs is:
Write a byte value 0 to address 0 (setting the next address-pointer to byte
address 1).
Read, starting from address 1.
Hence, for a 2048-byte or smaller EEPROM, the boot image must start at byte 1.
The interpretation of this sequence by 4096 bytes or larger EEPROMs is:
Write a 0 byte-long sequence to address 0 (setting next address pointer to byte
address 0).
Read, starting from address 0.
Hence, for a 4096-byte or larger EEPROM, the boot image must start at byte 0.
16 kilobytes
ATMEL 24C128
Full Array
2 bytes
32 kilobytes
ATMEL 24C256
Full Array
2 bytes
Tested
64 kilobytes
ATMEL 24C512
Full Array
2 bytes
Table 10: Examples of I2C EEPROM Devices
Size
Device
Write Protection
Coverage
Address Protocol
Comment