
Philips Semiconductors
PNX15xx Series
Volume 1 of 1
Chapter 11: QVCP
PNX15XX_SER_3
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 3 — 17 March 2006
11-56
31:23
Unused
-
22:0
Layer N Pitch
Semi Planar
R/W
0
Layer N Source Data Pitch in bytes. This sets pitch for data transfers
from the linear Frame Buffer memory to Layer N for semi planar
modes. The value is used independent of whether buffer A or B is
used. The value has to be rounded up to the next 64-bit word.
Offset 0x10 E22C
Layer Source Width (Semi Planar UV)
31:23
Unused
-
12:0
Layer N Source Width
Semi Planar
R/W
0
Layer N source width in bytes for semi planar modes. The value is
used independent of whether buffer A or B is used. The value has to
be rounded up to the next 64-bit word.
Offset 0x10 E230
Layer Start
31
Fine
R/W
0
Fine positioning enable for interlaced modes (layer size needs to be
set to odd + even number of lines).
Fine=0 : LayerNStartY is always relative to frame position, ie,
LayerNStartY=100 will display the layer at STG_Y_POS=100
position.
Fine=1 : LayerNStartY is always relative to eld position, ie.
LayerNStartY=100 will be translated to display layer at
STG_Y_POS=100/2=50 position.
Fine=1 is recommanded in interlaced mode.
Fine=0 is recommanded in progressive mode.
30:29
Unused
-
28:16
LayerNStartX
R/W
0
Layer N Start x position (from zero at left edge) in pixels. Negative X
start position is possible.
15:13
Unused
-
12:0
LayerNStartY
R/W
0
Layer N Start y position (from zero at top) in lines. Negative Y
position is allowed.
Note: In interlaced modes the following rules apply:
Fine=0 : LayerNStartY is always relative to frame position i.e.,
LayerNStartY=100 will display the layer at STG_Y_POS=100
position.
Fine=1 : LayerNStartY is always relative to eld position i.e.,
LayerNStartY=100 will be translated to display layer at
STG_Y_POS=100/2=50 position.
Fine=1 is recommanded in interlaced mode.
Fine=0 is recommanded in progressive mode.
Whenever layer y position is changed, please make sure other y
position sensitive register settings are still satised, such as :
start fetch register 10E2C8,
shadow reload position 10E1F0
layer start eld register 10E23C (for interlaced mode)
Offset 0x10 E234
Layer Size
31:28
Unused
-
27:16
LayerNHeight
R/W
0
Layer N height in lines.
15:12
Unused
-
Table 20: QVCP 1 Registers …Continued
Bit
Symbol
Acces
s
Value
Description