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參數(shù)資料
| 型號： | 84C300A |
| 英文描述： | 84C300A 4-Port Fast Ethernet Controller manual 3/98 |
| 中文描述： | 84C300A 4端口快速以太網(wǎng)控制器手冊3 / 98 |
| 文件頁數(shù)： | 20/56頁 |
| 文件大?。?/td> | 523K |
| 代理商： | 84C300A |
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84C300A 4-Port
Fast Ethernet Controller
4-20
MD400152/E
Conditions that Cause the RXDC Pin to go HIGH
As packets are discarded due to the receive packet
error conditions given in section “3.3.5 Receive
Discard Conditions”, the corresponding port’s RXDC
pin may or may not assert. If a receive packet’s status
has been written to the receive FIFO and the packet’s
status has not yet been read from the FIFO, discards
caused by following packets with errors are handled
within the chip and the RXDC pin will not go HIGH. If
all status double words for all packets written to the
FIFO have been read out then the RXDC pin will go
HIGH under the following condition:
1. Enough of a receive packet has been written to
the FIFO o cause RXRDY o go HIGH before he
packet is discarded due to an error condition.
2. If there are no status double words n the receive
FIFO and if RXRDY goes HIGH just before a
discard condition occurs, RXRDY may go LOW
again before any FIFO reads have occurred.
This is due to thereceive discard clearing the
FIFO of any receive bytes already written to the
FIFO. In this case, RXRDY is guaranteed to
remain HIGH for at least one RXRD_TXWR
clock cycle.
Detecting and Clearing a Receive Discard
Condition
To enable the output driver for the RXDC pins,
the RXINTEN input must be driven low. Once a
discard condition is detected, the receive discard can
be cleared by driving he RXINTEN nput ow and hen
PREAMBLE
1ST BYTE
6TH BYTE
A0 . . . A7
A8 . . . A15
SOURCE ADDRESS . . .
DESTINATION ADDRESS
BITS WITHIN A DOUBLE WORD TRANSMITTED/RECEIVED BIT NO.“0” FIRST THROUGH BIT NO. “31” LAST.
A40 . . . A47
A32 . . . A39
A24 . . . A31
A16 . . . A23
5TH BYTE
4TH BYTE
3RD BYTE
2ND BYTE
RXTXDATA0
RXTXDATA7
RXTXDATA24
RXTXDATA31
RXTXDATA0
RXTXDATA7
PREAMBLE
1ST BYTE
6TH BYTE
A0 . . . A7
A8 . . . A15
SOURCE ADDRESS . . .
DESTINATION ADDRESS
A40 . . . A47
A32 . . . A39
A24 . . . A31
A16 . . . A23
5TH BYTE
4TH BYTE
3RD BYTE
2ND BYTE
RXTXDATA24
RXTXDATA31
RXTXDATA0
RXTXDATA7
RXTXDATA24
RXTXDATA31
Bit Serialization/Deserialization for Big Endian Format
Bit Serialization/Deserialization for Little Endian Format
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 84C30A | 84C30A 10 Mbps Controller (MAC) manual 12/96 |
| 84C300A | 4-Port Fast Ethernet Controller(四端口快速以太網(wǎng)控制器) |
| 84CNQ035 | Schottky Rectifier |
| 84CNQ040 | Schottky Rectifier |
| 84CNQ045 | Schottky Rectifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 84C30A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:84C30A 10 Mbps Controller (MAC) manual 12/96 |
| 84C3A-A12-J06 | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
| 84C3A-A12-J06L | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
| 84C3A-A12-J08L | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
| 84C3A-A12-J10L | 制造商:BOURNS 制造商全稱:Bourns Electronic Solutions 功能描述:83/84 - 5/8 Square 10-Turn |
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