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| 型號： | 03H5716 |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, FP-100 |
| 文件頁數(shù)： | 67/70頁 |
| 文件大小： | 547K |
| 代理商： | 03H5716 |
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Product Part Number: IBM22-ALDC1020S-01
ALDC1-20S-HA
I B M Microelectronics Division
Document Number: DCAL2HDSU-02
Data Compression
Chapter 2. Functional Description
ALDC1-20S-HA provides a microprocessor inter-
face, an original data interface, a compressed
data interface, and a clock input.
Internal to ALDC1-20S-HA are the ALDC
encoder, ALDC decoder, and the ALDC1-20S-HA
registers.
Figure 2-1 illustrates these functional areas.
↑ DMA Device/Controller
↓
P
Interface
Original Data
Interface
↑
↓
Registers
ALDC
Encoder
Decoder
C
R
A
M
clock
Clock
Generation
↑
↓
Compressed Data
Interface
↑
↓ DMA Device/Controller
Figure
2-1. ALDC1-20S-HA High-level Functional
Units
2.1 Functional Areas
2.1.1 Microprocessor Interface
The microprocessor interface allows a micro-
processor to query status and control
ALDC1-20S-HA. The ALDC1-20S-HA registers
are externally accessible through the micro-
processor interface. These registers provide
the primary means by which ALDC1-20S-HA
and the microprocessor communicate.
Section 4.2 on page 4-1 describes the micro-
processor interface timing in detail. Section 3.1
on page 3-1 describes the ALDC1-20S-HA regis-
ters in detail.
2.1.2 Original Data Interface and
Compressed Data Interface
The original data interface and compressed
data interface are identically designed. They
are always discussed together in this docu-
ment.
The original data interface accepts data for
compression and provides decompressed data
to the bus connected to it. The compressed
data interface accepts compressed data for
decompression from the bus connected to it. It
provides compressed data to its bus.
The original data interface counts the bytes of
original data received during compression
operations and the bytes of decompressed data
sent during decompression operations. This
count is available in the Original Data Interface
Transfer Count (TCO) register.
The compressed data interface counts the bytes
of compressed data received during decom-
pression operations and the bytes of com-
pressed data sent during compression
operations. This count is available in the Com-
pressed Data Interface Transfer Count (TCC)
register.
The original data interface and compressed
data interface both buffer data during data
transfer operations in sixteen-byte FIFO's.
Section 4.3 on page 4-9 describes the original
data interface and compressed data interface in
detail.
2.1.3 Clock Generation
The clock generation circuitry accepts a single
clock input. It generates all internal clocks nec-
essary for ALDC1-20S-HA to function.
Section 4.4 on page 4-27 describes the clock
timing in detail.
(C) IBM CORP. 1993, 1994. ALL RIGHTS RESERVED. USE IS FURTHER SUBJECT TO THE PROVISIONS ON THE BACK OF THE TITLE PAGE.
2-1
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