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| 型號(hào)： | 03H5716 |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, 2.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, FP-100 |
| 文件頁(yè)數(shù)： | 46/70頁(yè) |
| 文件大小： | 547K |
| 代理商： | 03H5716 |
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Product Part Number: IBM22-ALDC1020S-01
ALDC1-20S-HA
I B M Microelectronics Division
Document Number: DCAL2HDSU-02
Data Compression
4.3.4 FIFO Operation
The original data interface and compressed
data interface both contain sixteen-byte FIFO's
that allow the user to optimize bus performance
by providing configurable FIFO thresholds.
These FIFO's are reset to empty by a hardware
reset, a software reset, or a data transfer oper-
ation.
Note: The Original Data Interface FIFO
Threshold (OCNF(3:0)) bits and the Compressed
Data Interface FIFO Threshold (CCNF(3:0)) bits
are independently configurable. In the dis-
cussion below, these threshold bits are called
the xFIFO threshold, where the "x" is replaced
by "O" only or "C" only, as appropriate.
The xFIFO threshold is written into the respec-
tive xCNF register through the microprocessor
interface. The xFIFO threshold may take on any
value from B'0000' to B'1111'.
4.3.4.1 Four-edge and Burst Devices
When the original data interface or compressed
data interface is configured as a four-edge or
burst device, then the xFIFO threshold is used
to trigger when xREQ activates and deactivates.
When transferring data out of the original data
interface or compressed data interface, xREQ
activates when the number of available bytes in
the xFIFO is greater than or equal to the xFIFO
threshold. The xREQ signal remains active until
the xFIFO is empty. When the xFIFO is empty,
xREQ deactivates.
Note: The xREQ signal also activates when,
during compression, the Original Data Interface
Transfer Count (TCO) register (or, during
decompression, the Compressed Data Interface
Transfer Count (TCC) register) equals the
Transfer Size (XFR) register. This condition
indicates that all bytes in the current data oper-
ation have been received and that only trans-
fers out of the compressed data interface (or
original data interface, respectively) remain.
When transferring data into the original data
interface or compressed data interface, xREQ
activates at the beginning of the transfer. When
the xFIFO is full, xREQ deactivates. The xREQ
signal activates each time the number of empty
byte locations in the xFIFO is greater than or
equal to the xFIFO threshold. The xREQ signal
remains active until the xFIFO is full.
4.3.4.2 Four-edge and Burst Controllers
When the original data interface or compressed
data interface is configured as a four-edge or
burst controller, then the xFIFO threshold is
used to trigger when xACK activates and deacti-
vates. The xFIFO conditions which cause xACK
to activate and deactivate are identical to those
which cause xREQ to activate and deactivate
when configured as a four-edge or burst device.
See section 4.3.4.1 above.
Note: The xACK signal can only be active after
the original data interface or compressed data
interface receives an active xREQ regardless of
the xFIFO threshold.
4.3.5 Almost Full and Almost Empty
The Almost Full (xAF) and Almost Empty (xAE)
signals are always available to the user. The
xAF signal can be used to perform a look-ahead
stop when transferring data into the original
data interface or compressed data interface.
The xAE signal can be used to perform a look-
ahead stop when transferring data out of the
original data interface or compressed data
interface.
The xAF signal deactivates when a transfer
operation begins. The xAF signal activates the
clock cycle after the number of empty byte
locations in the xFIFO is less than or equal to
the xFIFO threshold. The xAF signal deactivates
the clock cycle after the number of empty byte
locations in the xFIFO is greater than the xFIFO
threshold.
The xAE signal activates when a transfer opera-
tion begins. The xAE signal deactivates the
clock cycle after the number of available bytes
in the xFIFO is greater than the xFIFO threshold.
The xAE signal activates the clock cycle after
the number of available bytes in the xFIFO is
less than or equal to the xFIFO threshold.
See Figure 4-19 on page 4-27 for details.
(C) IBM CORP. 1993, 1994. ALL RIGHTS RESERVED. USE IS FURTHER SUBJECT TO THE PROVISIONS ON THE BACK OF THE TITLE PAGE.
4-26
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| 03HR-4K-P-N | 功能描述:CONN RECEPT HR 3POS 2.5MM BLACK RoHS:是 類別:連接器，互連式 >> 矩形 - 自由懸掛，面板安裝 系列:HR 標(biāo)準(zhǔn)包裝:500 系列:* 其它名稱:051382-100051382-1000513821000 |
| 03HR-6S | 功能描述:CONN RECEPT HR 3POS 2.5MM WHITE RoHS:否 類別:連接器，互連式 >> 矩形 - 自由懸掛，面板安裝 系列:HR 產(chǎn)品目錄繪圖:Receptacle Strip Form Polarized 特色產(chǎn)品:AMPMODU Connectors 3D 型號(hào):103957-9.pdf 標(biāo)準(zhǔn)包裝:22 系列:AMPMODU MTE 連接器類型:插座 觸點(diǎn)類型：:母形插口 位置數(shù):10 間距:0.100"（2.54mm） 行數(shù):1 行間距:- 安裝類型:自由懸掛 緊固型:銷鎖 電纜端接:IDC 導(dǎo)線類型:帶狀纜線 線規(guī):22-26 AWG 特點(diǎn):閉端 觸點(diǎn)表面涂層:金 觸點(diǎn)涂層厚度:15µin（0.38µm） 顏色:黑 包裝:管件 產(chǎn)品目錄頁(yè)面:246 (CN2011-ZH PDF) 配套產(chǎn)品:2-147324-6-ND - CONN HEADER 10POS R/A SMD TIN3-103634-3-ND - CONN HEADER 10POS R/A .100 TIN147324-9-ND - CONN HEADER 10POS R/A SMD W/POL147278-9-ND - CONN HEADER 10POS R/A SMD GOLD1375583-9-ND - CONN HEADER 10POS IDC SMD 30GOLD146132-8-ND - CONN HEADER BRKAWAY 10POS TIN1375549-9-ND - CONN HEADR 10POS IDC STR SMD TIN104348-8-ND - CONN HEADER 10POS R/A GOLD104347-8-ND - CONN HEADER 10POS R/A GOLD104346-8-ND - CONN HEADER 10POS VERT TIN更多... 相關(guān)產(chǎn)品:A28718-ND - HEAD (IDC) MODU MTE W/O TL 其它名稱:103957-9-NDA28423 |
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