參數(shù)資料
型號(hào)： 03H5716
元件分類： 通信及網(wǎng)絡(luò)
英文描述： SPECIALTY TELECOM CIRCUIT, PQFP100
封裝： 14 X 20 MM, 2.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, FP-100
文件頁(yè)數(shù)： 62/70頁(yè)
文件大?。?/td> 547K
代理商： 03H5716
Product Part Number: IBM22-ALDC1020S-01
ALDC1-20S-HA
I B M Microelectronics Division
Document Number: DCAL2HDSU-02
Data Compression
Appendix A. Notation
A.1 Bit Significance
Bit numbering and bit significance notation
follow the industry standard usage convention.
That is, lower bit numbers have lower bit signif-
icance and higher bit numbers have higher bit
significance.
A range of bits is noted by writing the most sig-
nificant bit and the least significant bit of the
range separated by a colon (:). For example,
bits seven through zero on a bus are written
7:0. Or, bits five through two of a register
named SAMP are written SAMP(5:2).
A.2 Binary Numbers
Binary numbers are denoted by B'##' in this
document, where ## is the binary number
being represented. For example, B'1010' is the
binary representation for decimal ten.
B'11000101' is equivalent to 197.
A.3 Hexadecimal Numbers
Hexadecimal numbers are denoted by X'##' in
this document, where ## is the hexadecimal
number to be represented. For example, X'A'
is the hexadecimal representation for decimal
ten. X'2CBE' is equivalent to 11454.
A.4 Pin and Signal Names
Pin and signal names are written in this docu-
ment using a special font. The pin name -RESET
(the ALDC1-20S-HA hardware reset pin) demon-
strates this font. In addition, if a pin or signal
name begins with a + then it is always positive
active (as in +ODATA(04)). If a pin or signal
name begins with a - then it is always negative
active (as in -RESET). If a pin or signal name
does not begin with a + or -, then its active
state is undefined or configurable.
A.5 Byte Order
In this document, lower order bytes are stored
at lower addresses in memory. When trans-
ferring data into and out of the original data
interface or compressed data interface (config-
ured to be two bytes wide), the second (higher
order) byte is at a consecutively higher address
than the first byte. For example, suppose a
long string of bytes was to be transferred into
the original data interface during a com-
pression operation. For this example, let the
first byte be X'01', the second byte be X'02',
the third byte be X'03', etc. Each higher order
byte is stored at a consecutively higher
address. Then on the first transfer into the ori-
ginal data interface, +ODATA(15) through
+ODATA(08) would be set to X'02' and
+ODATA(07) through +ODATA(00) would be set to
X'01'.
If an interface is configured to be one byte
wide, then the order of a byte is completely
determined by the order in which it is sent to or
received from the interface.
A.6 Device and Controller
Asynchronous handshaking protocols distin-
guish between devices (sometimes called
slaves) and controllers (sometimes called
masters). Within this document, references
made to devices and controllers use the fol-
lowing convention:
Device
A device is any circuitry which gen-
erates a request signal and receives
an acknowledge signal.
Controller A controller is any circuitry which
receives a request signal and gener-
ates an acknowledge signal.
(C) IBM CORP. 1993, 1994. ALL RIGHTS RESERVED. USE IS FURTHER SUBJECT TO THE PROVISIONS ON THE BACK OF THE TITLE PAGE.
A-1
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