參數(shù)資料
型號(hào)： 03H5716
元件分類： 通信及網(wǎng)絡(luò)
英文描述： SPECIALTY TELECOM CIRCUIT, PQFP100
封裝： 14 X 20 MM, 2.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, FP-100
文件頁數(shù)： 18/70頁
文件大?。?/td> 547K
代理商： 03H5716
Product Part Number: IBM22-ALDC1020S-01
ALDC1-20S-HA
I B M Microelectronics Division
Document Number: DCAL2HDSU-02
Data Compression
Chapter 4. Hardware Interface and Timing
4.1 Control Pins
The control pins are those pins which have
more than one logical function depending upon
the mode in which their respective interface is
configured. They are summarized below.
The signal names are used to associate the pin
names with their logical function.
Figure
4-1. Microprocessor Interface Control
Pins
Pin Name
Pin used as Signal When...
MMODE is tied
low.
MMODE is tied
high.
MCIN(0)
-READ
-CS
MCIN(1)
-WRITE
+R/-W
MCOUT
-WAIT
Figure
4-2. Original Data Interface and Compressed Data Interface Control Pins. When using this figure,
replace "x" by "O" only or "C" only, as appropriate. The "O" is used to describe original data
interface control pins and signals. The "C" is used to describe compressed data interface
control pins and signals.
Pin Name
Pin used as Signal When...
xCNF(13:12) = B'10'
(Controller)
xCNF(13:12) = B'00'
(Device)
CMND = X'C400'
(Peripheral Access)
xCIN
xREQ
xACK
not used
xCOUT(0)
xACK
xREQ
not used
xCOUT(1)
xWR
not used
xWR
xCOUT(2)
xRD
not used
xRD
xCOUT(3)
not used
xPCS
xCOUT(4)
xAF
xCOUT(5)
xAE
Note: The xPOL register controls the polarity of the control pins.
4.2 Microprocessor Interface
ALDC1-20S-HA provides an asynchronous inter-
face to the controlling microprocessor.
The microprocessor interface is shown in
Figure 4-3 on page 4-2.
The microprocessor interface can be run in
either one of two modes which are selected
using the MMODE pin. When MMODE is tied high,
the microprocessor interface is controlled using
a chip select and a read/write signal. When
MMODE is tied low, the microprocessor interface
is controlled using a read and a write signal.
Read timing using -CS and +R/-W on the micro-
processor interface is shown in Figure 4-4 on
page 4-2. Write timing using -CS and +R/-W on
the microprocessor interface is shown in
Figure 4-5 on page 4-4. Read timing using
-READ and -WRITE on the microprocessor inter-
face is shown in Figure 4-6 on page 4-6. Write
timing using -READ and -WRITE on the micro-
processor interface is shown in Figure 4-7 on
page 4-8.
Hardware reset timing on the microprocessor
interface is shown in Figure 4-8 on page 4-9.
+MDATA(07:00)
P
MCIN(0)
Interface
MCIN(1)
MCOUT
+ADDR(4:0)
MMODE
-RESET
-IREQOD
+IREQPP
Figure
4-3. Microprocessor Interface
(C) IBM CORP. 1993, 1994. ALL RIGHTS RESERVED. USE IS FURTHER SUBJECT TO THE PROVISIONS ON THE BACK OF THE TITLE PAGE.
4-1
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