![](http://datasheet.mmic.net.cn/380000/-PD784214Y_datasheet_16744924/-PD784214Y_536.png)
536
CHAPTER 25 STAND-BY FUNCTION
25.5.2 Releasing IDLE mode
The IDLE mode is released by NMI input, INTP0 to INTP6 input, watch timer interrupt (INTWT), key return interrupt,
or RESET input.
Table 25-8. Releasing IDLE Mode and Operation After Release
MK
Note 1
¥
¥
0
0
1
¥
ISM
Note 2
¥
¥
0
0
0
1
Release Source
RESET input
NMI pin input
INTP0 to INTP6
pin input, watch
timer interrupt,
key return
interrupt
State During Release
–
None while executing a
nonmaskable interrupt service
program
Executing a low-priority
nonmaskable interrupt service
program
Executing the service program
for the NMI pin input
Executing a high-priority
nonmaskable interrupt service
program
None while executing an
interrupt service program
Executing a low-priority
maskable interrupt service
program
The PRSL bit
Note 5
is cleared
to zero while executing an
interrupt service program at
priority level 3.
Executing the maskable interrupt
service program with the same
priority
(This excludes executing an
interrupt service program in
priority level 3 when the PRSL
bit
Note 5
is cleared to zero.)
Executing a high-priority interrupt
service program
–
–
Operation After Release
Normal reset operation
Accepts interrupt requests
Executes the instruction
following the MOV STBC,
#byte instruction (The interrupt
request that released the IDLE
mode is saved
Note 4
.)
Accepts interrupt requests
Execute the instruction
following the MOV STBC,
#byte instruction.
(The interrupt request that
released the IDLE mode is
saved
Note 4
.)
Holds the IDLE mode
IE
Note 3
¥
¥
1
0
¥
¥
Notes 1.
Interrupt mask bit in each interrupt request source
2.
Macro service enable flag that is in each interrupt request source
3.
Interrupt enable flag in the program status word (PSW)
4.
The saved interrupt request is accepted when acceptance is possible.
5.
Bit in the interrupt mode control register (IMC)