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13
TABLE OF CONTENTS
CHAPTER 1 OVERVIEW.................................................................................................................... 33
1.1
1.2
1.3
1.4
1.5
1.6
Features ................................................................................................................................. 35
Ordering Information ............................................................................................................ 36
Pin Configuration (Top View) ............................................................................................... 37
Block Diagram ....................................................................................................................... 40
Function List.......................................................................................................................... 41
Differences Between
m
PD784216 Subseries Products and
m
PD784216Y
Subseries Products............................................................................................................... 43
CHAPTER 2 PIN FUNCTIONS .......................................................................................................... 45
2.1
2.2
2.3
Pin Function List ................................................................................................................... 45
Pin Function Description ...................................................................................................... 50
Pin I/O Circuit and Handling of Unused Pins ...................................................................... 58
CHAPTER 3 CPU ARCHITECTURE .................................................................................................
63
3.1
3.2
3.3
Memory Space ....................................................................................................................... 63
Internal ROM Space .............................................................................................................. 68
Base Area............................................................................................................................... 69
3.3.1
Vector table area........................................................................................................................
3.3.2
CALLT instruction table area......................................................................................................
3.3.3
CALLF instruction entry area .....................................................................................................
Internal Data Space ............................................................................................................... 72
3.4.1
Internal RAM space ...................................................................................................................
3.4.2
Special function register (SFR) area..........................................................................................
3.4.3
External SFR area .....................................................................................................................
External Memory Space ........................................................................................................ 76
m
PD78F4216 Memory Mapping............................................................................................. 77
Control Registers .................................................................................................................. 78
3.7.1
Program counter (PC)................................................................................................................
3.7.2
Program status word (PSW) ......................................................................................................
3.7.3
Using the RSS bit ......................................................................................................................
3.7.4
Stack pointer (SP)......................................................................................................................
General-Purpose Registers .................................................................................................. 89
3.8.1
Structure ....................................................................................................................................
3.8.2
Functions ...................................................................................................................................
Special Function Registers (SFRs)...................................................................................... 94
Cautions ................................................................................................................................. 100
70
71
71
3.4
73
76
76
3.5
3.6
3.7
78
78
82
85
3.8
89
91
3.9
3.10
CHAPTER 4 CLOCK GENERATOR ................................................................................................. 101
4.1
4.2
4.3
Functions ............................................................................................................................... 101
Configuration......................................................................................................................... 101
Control Register .................................................................................................................... 103