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23
8-27
8-28
8-29
8-30
8-31
8-32
Control Register Settings for One-Shot Pulse Output with External Trigger.......................................... 185
Timing of One-Shot Pulse Output Operation with External Trigger (with rising edge specified) ............ 186
Start Timing of 16-Bit Timer Register ..................................................................................................... 187
Timing after Changing Compare Register during Timer Count Operation ............................................. 187
Data Hold Timing of Capture Register ................................................................................................... 188
Operation Timing of OVF0 Flag ............................................................................................................. 189
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
Block Diagram of 8-bit Timer/Counter 1, 2............................................................................................. 192
Format of the 8-Bit Timer Mode Control Register 1 (TMC1) .................................................................. 195
Format of the 8-Bit Timer Mode Control Register 2 (TMC2) .................................................................. 196
Format of the Prescaler Mode Register 1 (PRM1) ................................................................................ 197
Format of the Prescaler Mode Register 2 (PRM2) ................................................................................ 198
Timing of Interval Timer Operation......................................................................................................... 200
Timing of the External Event Counter Operation (when rising edge is set) ........................................... 203
Timing of the PWM Output..................................................................................................................... 206
Timing of Operation Based on CRn0 Transitions................................................................................... 207
Cascade Connection Mode with 16-Bit Resolution................................................................................ 209
Start Timing of 8-Bit Timer ..................................................................................................................... 209
Timing After the Compare Register Changes During Timer Counting ................................................... 210
10-1
10-2
10-3
10-4
10-5
10-6
10-7
10-8
10-9
10-10
10-11
10-12
Block Diagram of 8-bit Timer/Counter 5, 6............................................................................................. 212
Format of the 8-Bit Timer Mode Control Register 5 (TMC5) .................................................................. 215
Format of the 8-Bit Timer Mode Control Register 6 (TMC6) .................................................................. 216
Format of the Prescaler Mode Register 5 (PRM5) ................................................................................ 217
Format of the Prescaler Mode Register 6 (PRM6) ................................................................................ 218
Timing of Interval Timer Operation......................................................................................................... 220
Timing of the External Event Counter Operation (when rising edge is set) ........................................... 223
Timing of the PWM Output..................................................................................................................... 226
Timing of Operation Based on CRn0 Transitions................................................................................... 227
Cascade Connection Mode with 16-Bit Resolution................................................................................ 229
Start Timing of 8-Bit Timer ..................................................................................................................... 229
Timing After the Compare Register Changes During Timer Counting ................................................... 230
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
11-10
Block Diagram of 8-bit Timer/Counter 7, 8............................................................................................. 232
Format of 8-Bit Timer Mode Control Register 7 (TMC7) ........................................................................ 235
Format of 8-Bit Timer Mode Control Register 8 (TMC8) ........................................................................ 236
Format of Prescaler Mode Register 7 (PRM7) ...................................................................................... 237
Format of Prescaler Mode Register 8 (PRM8) ...................................................................................... 238
Timing of Interval Timer Operation......................................................................................................... 240
Timing of External Event Counter Operation (when rising edge is set) ................................................. 243
Timing of PWM Output........................................................................................................................... 246
Timing of Operation Based on CRn0 Transitions................................................................................... 247
Cascade Connection Mode with 16-Bit Resolution................................................................................ 249
LIST OF FIGURES (3/8)
Figure No.
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