參數(shù)資料
型號(hào)： μPD45128441
廠商： NEC Corp.
英文描述： 128M-bit Synchronous DRAM(128M 同步DRAM)
中文描述： 128兆位同步DRAM（128M的同步DRAM）的
文件頁(yè)數(shù)： 83/84頁(yè)
文件大?。?/td> 693K
代理商： ΜPD45128441
Preliminary Data Sheet
83
μ
PD45128441, 45128841, 45128163
NOTES FOR CMOS DEVICES
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note: Strong electric field, when exposed to a MOS device, can cause destruction
of the gate oxide and ultimately degrade the device operation. Steps must
be taken to stop generation of static electricity as much as possible, and
quickly dissipate it once, when it has occurred. Environmental control must
be adequate. When it is dry, humidifier should be used. It is recommended
to avoid using insulators that easily build static electricity. Semiconductor
devices must be stored and transported in an anti-static container, static
shielding bag or conductive material. All test and measurement tools
including work bench and floor should be grounded. The operator should
be grounded using wrist strap. Semiconductor devices must not be touched
with bare hands. Similar precautions need to be taken for PW boards with
semiconductor devices on it.
2
HANDLING OF UNUSED INPUT PINS FOR CMOS
Note: No connection for CMOS device inputs can be cause of malfunction. If no
connection is provided to the input pins, it is possible that an internal input
level may be generated due to noise, etc., hence causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of
CMOS devices must be fixed high or low by using a pull-up or pull-down
circuitry. Each unused pin should be connected to V
DD
or GND with a
resistor, if it is considered to have a possibility of being an output pin. All
handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note: Power-on does not necessarily define initial status of MOS device. Production
process of MOS does not define the initial operation status of the device.
Immediately after the power source is turned ON, the devices with reset
function have not yet been initialized. Hence, power-on does not guarantee
out-pin levels, I/O settings or contents of registers. Device is not initialized
until the reset signal is received. Reset operation must be executed imme-
diately after power-on for devices having reset function.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PD45128441G5 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
PD45128441G5-A10I-9JF 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
PD45128441G5-A10LI-9JF 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
PD45128441G5-A10LT-9JF 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
PD45128441G5-A10T-9JF 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)
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