參數(shù)資料
型號: μPD45128441
廠商: NEC Corp.
英文描述: 128M-bit Synchronous DRAM(128M 同步DRAM)
中文描述: 128兆位同步DRAM(128M的同步DRAM)的
文件頁數(shù): 22/84頁
文件大?。?/td> 693K
代理商: ΜPD45128441
Preliminary Data Sheet
22
μ
PD45128441, 45128841, 45128163
7. Mode Register
WT = 1
1
2
4
8
R
R
R
R
1
0
0
0
0
0
1
2
3
4
5
7
6
8
9
10
11
JEDEC Standard Test Set (refresh counter test)
BL
WT
LTMODE
0
0
1
x
x
0
1
2
3
4
5
7
6
8
9
10
11
Burst Read and Single Write
(for Write Through Cache)
0
1
0
1
2
3
4
5
7
6
8
9
10
11
Use in future
V
V
V
V
V
V
1
V
1
x
x
x
0
1
2
3
4
5
7
6
8
9
10
11
Vender Specific
BL
WT
LTMODE
0
0
0
0
0
0
1
2
3
4
5
7
6
8
9
10
11
Mode Register Set
V = Valid
x = Don’t care
WT = 0
1
2
4
8
R
R
R
Full page
Bits2-0
000
001
010
011
100
101
110
111
Burst length
Sequential
Interleave
0
1
Wrap type
/CAS latency
R
R
2
3
R
R
R
R
Bits6-4
000
001
010
011
100
101
110
111
Latency
mode
0
0
12
13
x
x
12
13
12
13
x
x
12
13
0
0
12
13
Remark
R : Reserved
CLK
CKE
/CS
/RAS
/CAS
/WE
A0 - A13
Mode Register Write
Mode Register Write Timing
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